finished routing

This commit is contained in:
2020-10-10 17:54:59 +02:00
parent 80004a1edb
commit 337105b6fc
9 changed files with 8992 additions and 6463 deletions

View File

@@ -1,4 +1,4 @@
update=Do 08 Okt 2020 20:40:16 CEST
update=Sa 10 Okt 2020 15:43:28 CEST
version=1
last_client=kicad
[general]
@@ -32,29 +32,30 @@ AllowMicroVias=0
AllowBlindVias=0
RequireCourtyardDefinitions=0
ProhibitOverlappingCourtyards=1
MinTrackWidth=0.2
MinViaDiameter=0.4
MinTrackWidth=0.127
MinViaDiameter=0.127
MinViaDrill=0.3
MinMicroViaDiameter=0.2
MinMicroViaDrill=0.09999999999999999
MinHoleToHole=0.25
TrackWidth1=0.25
TrackWidth2=0.2
TrackWidth3=0.254
TrackWidth4=0.381
TrackWidth5=0.508
TrackWidth6=1
TrackWidth7=1.27
TrackWidth8=2
TrackWidth9=2.54
TrackWidth10=3
ViaDiameter1=0.8
ViaDrill1=0.4
TrackWidth1=0.127
TrackWidth2=0.127
TrackWidth3=0.2
TrackWidth4=0.254
TrackWidth5=0.381
TrackWidth6=0.508
TrackWidth7=1
TrackWidth8=1.27
TrackWidth9=2
TrackWidth10=2.54
TrackWidth11=3
ViaDiameter1=0.45
ViaDrill1=0.3
ViaDiameter2=0.635
ViaDrill2=0.3048
ViaDiameter3=1.27
ViaDrill3=0.635
dPairWidth1=0.2
dPairWidth1=0.25
dPairGap1=0.25
dPairViaGap1=0.25
SilkLineWidth=0.12
@@ -251,11 +252,11 @@ Enabled=0
[pcbnew/Netclasses/Default]
Name=Default
Clearance=0.2
TrackWidth=0.25
ViaDiameter=0.8
ViaDrill=0.4
uViaDiameter=0.3
TrackWidth=0.127
ViaDiameter=0.45
ViaDrill=0.3
uViaDiameter=5
uViaDrill=0.1
dPairWidth=0.2
dPairWidth=0.25
dPairGap=0.25
dPairViaGap=0.25