ARM GAS /tmp/ccZ9xwps.s page 1 1 .cpu cortex-m3 2 .eabi_attribute 20, 1 3 .eabi_attribute 21, 1 4 .eabi_attribute 23, 3 5 .eabi_attribute 24, 1 6 .eabi_attribute 25, 1 7 .eabi_attribute 26, 1 8 .eabi_attribute 30, 1 9 .eabi_attribute 34, 1 10 .eabi_attribute 18, 4 11 .file "main.c" 12 .text 13 .Ltext0: 14 .cfi_sections .debug_frame 15 .section .text.MX_GPIO_Init,"ax",%progbits 16 .align 1 17 .arch armv7-m 18 .syntax unified 19 .thumb 20 .thumb_func 21 .fpu softvfp 23 MX_GPIO_Init: 24 .LFB68: 25 .file 1 "Core/Src/main.c" 1:Core/Src/main.c **** /* USER CODE BEGIN Header */ 2:Core/Src/main.c **** /** 3:Core/Src/main.c **** ****************************************************************************** 4:Core/Src/main.c **** * @file : main.c 5:Core/Src/main.c **** * @brief : Main program body 6:Core/Src/main.c **** ****************************************************************************** 7:Core/Src/main.c **** * @attention 8:Core/Src/main.c **** * 9:Core/Src/main.c **** *

© Copyright (c) 2020 STMicroelectronics. 10:Core/Src/main.c **** * All rights reserved.

11:Core/Src/main.c **** * 12:Core/Src/main.c **** * This software component is licensed by ST under BSD 3-Clause license, 13:Core/Src/main.c **** * the "License"; You may not use this file except in compliance with the 14:Core/Src/main.c **** * License. You may obtain a copy of the License at: 15:Core/Src/main.c **** * opensource.org/licenses/BSD-3-Clause 16:Core/Src/main.c **** * 17:Core/Src/main.c **** ****************************************************************************** 18:Core/Src/main.c **** */ 19:Core/Src/main.c **** /* USER CODE END Header */ 20:Core/Src/main.c **** /* Includes ------------------------------------------------------------------*/ 21:Core/Src/main.c **** #include "main.h" 22:Core/Src/main.c **** 23:Core/Src/main.c **** /* Private includes ----------------------------------------------------------*/ 24:Core/Src/main.c **** /* USER CODE BEGIN Includes */ 25:Core/Src/main.c **** 26:Core/Src/main.c **** /* USER CODE END Includes */ 27:Core/Src/main.c **** 28:Core/Src/main.c **** /* Private typedef -----------------------------------------------------------*/ 29:Core/Src/main.c **** /* USER CODE BEGIN PTD */ 30:Core/Src/main.c **** 31:Core/Src/main.c **** /* USER CODE END PTD */ 32:Core/Src/main.c **** 33:Core/Src/main.c **** /* Private define ------------------------------------------------------------*/ ARM GAS /tmp/ccZ9xwps.s page 2 34:Core/Src/main.c **** /* USER CODE BEGIN PD */ 35:Core/Src/main.c **** #define PIN_RELAY_USB GPIO_PIN_0 36:Core/Src/main.c **** #define PIN_RELAY_GP GPIO_PIN_1 37:Core/Src/main.c **** #define PIN_USB_NOT_OE GPIO_PIN_2 38:Core/Src/main.c **** #define PIN_USB_S GPIO_PIN_3 39:Core/Src/main.c **** #define PIN_USER_LED GPIO_PIN_4 40:Core/Src/main.c **** /* USER CODE END PD */ 41:Core/Src/main.c **** 42:Core/Src/main.c **** /* Private macro -------------------------------------------------------------*/ 43:Core/Src/main.c **** /* USER CODE BEGIN PM */ 44:Core/Src/main.c **** 45:Core/Src/main.c **** /* USER CODE END PM */ 46:Core/Src/main.c **** 47:Core/Src/main.c **** /* Private variables ---------------------------------------------------------*/ 48:Core/Src/main.c **** CAN_HandleTypeDef hcan; 49:Core/Src/main.c **** 50:Core/Src/main.c **** /* USER CODE BEGIN PV */ 51:Core/Src/main.c **** 52:Core/Src/main.c **** /* USER CODE END PV */ 53:Core/Src/main.c **** 54:Core/Src/main.c **** /* Private function prototypes -----------------------------------------------*/ 55:Core/Src/main.c **** void SystemClock_Config(void); 56:Core/Src/main.c **** static void MX_GPIO_Init(void); 57:Core/Src/main.c **** static void MX_CAN_Init(void); 58:Core/Src/main.c **** /* USER CODE BEGIN PFP */ 59:Core/Src/main.c **** 60:Core/Src/main.c **** /* USER CODE END PFP */ 61:Core/Src/main.c **** 62:Core/Src/main.c **** /* Private user code ---------------------------------------------------------*/ 63:Core/Src/main.c **** /* USER CODE BEGIN 0 */ 64:Core/Src/main.c **** 65:Core/Src/main.c **** /* USER CODE END 0 */ 66:Core/Src/main.c **** 67:Core/Src/main.c **** /** 68:Core/Src/main.c **** * @brief The application entry point. 69:Core/Src/main.c **** * @retval int 70:Core/Src/main.c **** */ 71:Core/Src/main.c **** int main(void) 72:Core/Src/main.c **** { 73:Core/Src/main.c **** /* USER CODE BEGIN 1 */ 74:Core/Src/main.c **** 75:Core/Src/main.c **** /* USER CODE END 1 */ 76:Core/Src/main.c **** 77:Core/Src/main.c **** /* MCU Configuration--------------------------------------------------------*/ 78:Core/Src/main.c **** 79:Core/Src/main.c **** /* Reset of all peripherals, Initializes the Flash interface and the Systick. */ 80:Core/Src/main.c **** HAL_Init(); 81:Core/Src/main.c **** 82:Core/Src/main.c **** /* USER CODE BEGIN Init */ 83:Core/Src/main.c **** 84:Core/Src/main.c **** /* USER CODE END Init */ 85:Core/Src/main.c **** 86:Core/Src/main.c **** /* Configure the system clock */ 87:Core/Src/main.c **** SystemClock_Config(); 88:Core/Src/main.c **** 89:Core/Src/main.c **** /* USER CODE BEGIN SysInit */ 90:Core/Src/main.c **** ARM GAS /tmp/ccZ9xwps.s page 3 91:Core/Src/main.c **** /* USER CODE END SysInit */ 92:Core/Src/main.c **** 93:Core/Src/main.c **** /* Initialize all configured peripherals */ 94:Core/Src/main.c **** MX_GPIO_Init(); 95:Core/Src/main.c **** MX_CAN_Init(); 96:Core/Src/main.c **** /* USER CODE BEGIN 2 */ 97:Core/Src/main.c **** // Pull the Output enable low to activate TS3USB221 98:Core/Src/main.c **** GPIOA->ODR &= !PIN_USB_NOT_OE; 99:Core/Src/main.c **** 100:Core/Src/main.c **** /* USER CODE END 2 */ 101:Core/Src/main.c **** 102:Core/Src/main.c **** /* Infinite loop */ 103:Core/Src/main.c **** /* USER CODE BEGIN WHILE */ 104:Core/Src/main.c **** while (1) 105:Core/Src/main.c **** { 106:Core/Src/main.c **** /* USER CODE END WHILE */ 107:Core/Src/main.c **** 108:Core/Src/main.c **** /* USER CODE BEGIN 3 */ 109:Core/Src/main.c **** // Enable USB Power 110:Core/Src/main.c **** GPIOA->ODR ^= PIN_RELAY_USB; 111:Core/Src/main.c **** // First apply Power to give the slave device time to init 112:Core/Src/main.c **** HAL_Delay(200);; 113:Core/Src/main.c **** GPIOA->ODR ^= PIN_USB_S; 114:Core/Src/main.c **** GPIOA->ODR ^= PIN_USER_LED; 115:Core/Src/main.c **** 116:Core/Src/main.c **** HAL_Delay(10000); 117:Core/Src/main.c **** } 118:Core/Src/main.c **** /* USER CODE END 3 */ 119:Core/Src/main.c **** } 120:Core/Src/main.c **** 121:Core/Src/main.c **** /** 122:Core/Src/main.c **** * @brief System Clock Configuration 123:Core/Src/main.c **** * @retval None 124:Core/Src/main.c **** */ 125:Core/Src/main.c **** void SystemClock_Config(void) 126:Core/Src/main.c **** { 127:Core/Src/main.c **** RCC_OscInitTypeDef RCC_OscInitStruct = {0}; 128:Core/Src/main.c **** RCC_ClkInitTypeDef RCC_ClkInitStruct = {0}; 129:Core/Src/main.c **** 130:Core/Src/main.c **** /** Initializes the RCC Oscillators according to the specified parameters 131:Core/Src/main.c **** * in the RCC_OscInitTypeDef structure. 132:Core/Src/main.c **** */ 133:Core/Src/main.c **** RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE; 134:Core/Src/main.c **** RCC_OscInitStruct.HSEState = RCC_HSE_ON; 135:Core/Src/main.c **** RCC_OscInitStruct.HSEPredivValue = RCC_HSE_PREDIV_DIV1; 136:Core/Src/main.c **** RCC_OscInitStruct.HSIState = RCC_HSI_ON; 137:Core/Src/main.c **** RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON; 138:Core/Src/main.c **** RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE; 139:Core/Src/main.c **** RCC_OscInitStruct.PLL.PLLMUL = RCC_PLL_MUL9; 140:Core/Src/main.c **** if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) 141:Core/Src/main.c **** { 142:Core/Src/main.c **** Error_Handler(); 143:Core/Src/main.c **** } 144:Core/Src/main.c **** /** Initializes the CPU, AHB and APB buses clocks 145:Core/Src/main.c **** */ 146:Core/Src/main.c **** RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK 147:Core/Src/main.c **** |RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2; ARM GAS /tmp/ccZ9xwps.s page 4 148:Core/Src/main.c **** RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK; 149:Core/Src/main.c **** RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1; 150:Core/Src/main.c **** RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1; 151:Core/Src/main.c **** RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1; 152:Core/Src/main.c **** 153:Core/Src/main.c **** if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_1) != HAL_OK) 154:Core/Src/main.c **** { 155:Core/Src/main.c **** Error_Handler(); 156:Core/Src/main.c **** } 157:Core/Src/main.c **** } 158:Core/Src/main.c **** 159:Core/Src/main.c **** /** 160:Core/Src/main.c **** * @brief CAN Initialization Function 161:Core/Src/main.c **** * @param None 162:Core/Src/main.c **** * @retval None 163:Core/Src/main.c **** */ 164:Core/Src/main.c **** static void MX_CAN_Init(void) 165:Core/Src/main.c **** { 166:Core/Src/main.c **** 167:Core/Src/main.c **** /* USER CODE BEGIN CAN_Init 0 */ 168:Core/Src/main.c **** 169:Core/Src/main.c **** /* USER CODE END CAN_Init 0 */ 170:Core/Src/main.c **** 171:Core/Src/main.c **** /* USER CODE BEGIN CAN_Init 1 */ 172:Core/Src/main.c **** 173:Core/Src/main.c **** /* USER CODE END CAN_Init 1 */ 174:Core/Src/main.c **** hcan.Instance = CAN1; 175:Core/Src/main.c **** hcan.Init.Prescaler = 16; 176:Core/Src/main.c **** hcan.Init.Mode = CAN_MODE_NORMAL; 177:Core/Src/main.c **** hcan.Init.SyncJumpWidth = CAN_SJW_1TQ; 178:Core/Src/main.c **** hcan.Init.TimeSeg1 = CAN_BS1_1TQ; 179:Core/Src/main.c **** hcan.Init.TimeSeg2 = CAN_BS2_1TQ; 180:Core/Src/main.c **** hcan.Init.TimeTriggeredMode = DISABLE; 181:Core/Src/main.c **** hcan.Init.AutoBusOff = DISABLE; 182:Core/Src/main.c **** hcan.Init.AutoWakeUp = DISABLE; 183:Core/Src/main.c **** hcan.Init.AutoRetransmission = DISABLE; 184:Core/Src/main.c **** hcan.Init.ReceiveFifoLocked = DISABLE; 185:Core/Src/main.c **** hcan.Init.TransmitFifoPriority = DISABLE; 186:Core/Src/main.c **** if (HAL_CAN_Init(&hcan) != HAL_OK) 187:Core/Src/main.c **** { 188:Core/Src/main.c **** Error_Handler(); 189:Core/Src/main.c **** } 190:Core/Src/main.c **** /* USER CODE BEGIN CAN_Init 2 */ 191:Core/Src/main.c **** 192:Core/Src/main.c **** /* USER CODE END CAN_Init 2 */ 193:Core/Src/main.c **** 194:Core/Src/main.c **** } 195:Core/Src/main.c **** 196:Core/Src/main.c **** /** 197:Core/Src/main.c **** * @brief GPIO Initialization Function 198:Core/Src/main.c **** * @param None 199:Core/Src/main.c **** * @retval None 200:Core/Src/main.c **** */ 201:Core/Src/main.c **** static void MX_GPIO_Init(void) 202:Core/Src/main.c **** { 26 .loc 1 202 1 view -0 27 .cfi_startproc ARM GAS /tmp/ccZ9xwps.s page 5 28 @ args = 0, pretend = 0, frame = 32 29 @ frame_needed = 0, uses_anonymous_args = 0 30 0000 30B5 push {r4, r5, lr} 31 .LCFI0: 32 .cfi_def_cfa_offset 12 33 .cfi_offset 4, -12 34 .cfi_offset 5, -8 35 .cfi_offset 14, -4 36 0002 89B0 sub sp, sp, #36 37 .LCFI1: 38 .cfi_def_cfa_offset 48 203:Core/Src/main.c **** GPIO_InitTypeDef GPIO_InitStruct = {0}; 39 .loc 1 203 3 view .LVU1 40 .loc 1 203 20 is_stmt 0 view .LVU2 41 0004 0024 movs r4, #0 42 0006 0494 str r4, [sp, #16] 43 0008 0594 str r4, [sp, #20] 44 000a 0694 str r4, [sp, #24] 45 000c 0794 str r4, [sp, #28] 204:Core/Src/main.c **** 205:Core/Src/main.c **** /* GPIO Ports Clock Enable */ 206:Core/Src/main.c **** __HAL_RCC_GPIOD_CLK_ENABLE(); 46 .loc 1 206 3 is_stmt 1 view .LVU3 47 .LBB2: 48 .loc 1 206 3 view .LVU4 49 .loc 1 206 3 view .LVU5 50 000e 174B ldr r3, .L3 51 0010 9A69 ldr r2, [r3, #24] 52 0012 42F02002 orr r2, r2, #32 53 0016 9A61 str r2, [r3, #24] 54 .loc 1 206 3 view .LVU6 55 0018 9A69 ldr r2, [r3, #24] 56 001a 02F02002 and r2, r2, #32 57 001e 0192 str r2, [sp, #4] 58 .loc 1 206 3 view .LVU7 59 0020 019A ldr r2, [sp, #4] 60 .LBE2: 207:Core/Src/main.c **** __HAL_RCC_GPIOA_CLK_ENABLE(); 61 .loc 1 207 3 view .LVU8 62 .LBB3: 63 .loc 1 207 3 view .LVU9 64 .loc 1 207 3 view .LVU10 65 0022 9A69 ldr r2, [r3, #24] 66 0024 42F00402 orr r2, r2, #4 67 0028 9A61 str r2, [r3, #24] 68 .loc 1 207 3 view .LVU11 69 002a 9A69 ldr r2, [r3, #24] 70 002c 02F00402 and r2, r2, #4 71 0030 0292 str r2, [sp, #8] 72 .loc 1 207 3 view .LVU12 73 0032 029A ldr r2, [sp, #8] 74 .LBE3: 208:Core/Src/main.c **** __HAL_RCC_GPIOB_CLK_ENABLE(); 75 .loc 1 208 3 view .LVU13 76 .LBB4: 77 .loc 1 208 3 view .LVU14 78 .loc 1 208 3 view .LVU15 ARM GAS /tmp/ccZ9xwps.s page 6 79 0034 9A69 ldr r2, [r3, #24] 80 0036 42F00802 orr r2, r2, #8 81 003a 9A61 str r2, [r3, #24] 82 .loc 1 208 3 view .LVU16 83 003c 9B69 ldr r3, [r3, #24] 84 003e 03F00803 and r3, r3, #8 85 0042 0393 str r3, [sp, #12] 86 .loc 1 208 3 view .LVU17 87 0044 039B ldr r3, [sp, #12] 88 .LBE4: 209:Core/Src/main.c **** 210:Core/Src/main.c **** /*Configure GPIO pin Output Level */ 211:Core/Src/main.c **** HAL_GPIO_WritePin(GPIOA, GPIO_PIN_0|GPIO_PIN_1|GPIO_PIN_2|GPIO_PIN_3 89 .loc 1 211 3 view .LVU18 90 0046 0A4D ldr r5, .L3+4 91 0048 2246 mov r2, r4 92 004a 1F21 movs r1, #31 93 004c 2846 mov r0, r5 94 004e FFF7FEFF bl HAL_GPIO_WritePin 95 .LVL0: 212:Core/Src/main.c **** |GPIO_PIN_4, GPIO_PIN_RESET); 213:Core/Src/main.c **** 214:Core/Src/main.c **** /*Configure GPIO pins : PA0 PA1 PA2 PA3 215:Core/Src/main.c **** PA4 */ 216:Core/Src/main.c **** GPIO_InitStruct.Pin = GPIO_PIN_0|GPIO_PIN_1|GPIO_PIN_2|GPIO_PIN_3 96 .loc 1 216 3 view .LVU19 97 .loc 1 216 23 is_stmt 0 view .LVU20 98 0052 1F23 movs r3, #31 99 0054 0493 str r3, [sp, #16] 217:Core/Src/main.c **** |GPIO_PIN_4; 218:Core/Src/main.c **** GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; 100 .loc 1 218 3 is_stmt 1 view .LVU21 101 .loc 1 218 24 is_stmt 0 view .LVU22 102 0056 0123 movs r3, #1 103 0058 0593 str r3, [sp, #20] 219:Core/Src/main.c **** GPIO_InitStruct.Pull = GPIO_NOPULL; 104 .loc 1 219 3 is_stmt 1 view .LVU23 105 .loc 1 219 24 is_stmt 0 view .LVU24 106 005a 0694 str r4, [sp, #24] 220:Core/Src/main.c **** GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; 107 .loc 1 220 3 is_stmt 1 view .LVU25 108 .loc 1 220 25 is_stmt 0 view .LVU26 109 005c 0223 movs r3, #2 110 005e 0793 str r3, [sp, #28] 221:Core/Src/main.c **** HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); 111 .loc 1 221 3 is_stmt 1 view .LVU27 112 0060 04A9 add r1, sp, #16 113 0062 2846 mov r0, r5 114 0064 FFF7FEFF bl HAL_GPIO_Init 115 .LVL1: 222:Core/Src/main.c **** 223:Core/Src/main.c **** } 116 .loc 1 223 1 is_stmt 0 view .LVU28 117 0068 09B0 add sp, sp, #36 118 .LCFI2: 119 .cfi_def_cfa_offset 12 120 @ sp needed ARM GAS /tmp/ccZ9xwps.s page 7 121 006a 30BD pop {r4, r5, pc} 122 .L4: 123 .align 2 124 .L3: 125 006c 00100240 .word 1073876992 126 0070 00080140 .word 1073809408 127 .cfi_endproc 128 .LFE68: 130 .section .text.MX_CAN_Init,"ax",%progbits 131 .align 1 132 .syntax unified 133 .thumb 134 .thumb_func 135 .fpu softvfp 137 MX_CAN_Init: 138 .LFB67: 165:Core/Src/main.c **** 139 .loc 1 165 1 is_stmt 1 view -0 140 .cfi_startproc 141 @ args = 0, pretend = 0, frame = 0 142 @ frame_needed = 0, uses_anonymous_args = 0 143 0000 08B5 push {r3, lr} 144 .LCFI3: 145 .cfi_def_cfa_offset 8 146 .cfi_offset 3, -8 147 .cfi_offset 14, -4 174:Core/Src/main.c **** hcan.Init.Prescaler = 16; 148 .loc 1 174 3 view .LVU30 174:Core/Src/main.c **** hcan.Init.Prescaler = 16; 149 .loc 1 174 17 is_stmt 0 view .LVU31 150 0002 0948 ldr r0, .L7 151 0004 094B ldr r3, .L7+4 152 0006 0360 str r3, [r0] 175:Core/Src/main.c **** hcan.Init.Mode = CAN_MODE_NORMAL; 153 .loc 1 175 3 is_stmt 1 view .LVU32 175:Core/Src/main.c **** hcan.Init.Mode = CAN_MODE_NORMAL; 154 .loc 1 175 23 is_stmt 0 view .LVU33 155 0008 1023 movs r3, #16 156 000a 4360 str r3, [r0, #4] 176:Core/Src/main.c **** hcan.Init.SyncJumpWidth = CAN_SJW_1TQ; 157 .loc 1 176 3 is_stmt 1 view .LVU34 176:Core/Src/main.c **** hcan.Init.SyncJumpWidth = CAN_SJW_1TQ; 158 .loc 1 176 18 is_stmt 0 view .LVU35 159 000c 0023 movs r3, #0 160 000e 8360 str r3, [r0, #8] 177:Core/Src/main.c **** hcan.Init.TimeSeg1 = CAN_BS1_1TQ; 161 .loc 1 177 3 is_stmt 1 view .LVU36 177:Core/Src/main.c **** hcan.Init.TimeSeg1 = CAN_BS1_1TQ; 162 .loc 1 177 27 is_stmt 0 view .LVU37 163 0010 C360 str r3, [r0, #12] 178:Core/Src/main.c **** hcan.Init.TimeSeg2 = CAN_BS2_1TQ; 164 .loc 1 178 3 is_stmt 1 view .LVU38 178:Core/Src/main.c **** hcan.Init.TimeSeg2 = CAN_BS2_1TQ; 165 .loc 1 178 22 is_stmt 0 view .LVU39 166 0012 0361 str r3, [r0, #16] 179:Core/Src/main.c **** hcan.Init.TimeTriggeredMode = DISABLE; 167 .loc 1 179 3 is_stmt 1 view .LVU40 ARM GAS /tmp/ccZ9xwps.s page 8 179:Core/Src/main.c **** hcan.Init.TimeTriggeredMode = DISABLE; 168 .loc 1 179 22 is_stmt 0 view .LVU41 169 0014 4361 str r3, [r0, #20] 180:Core/Src/main.c **** hcan.Init.AutoBusOff = DISABLE; 170 .loc 1 180 3 is_stmt 1 view .LVU42 180:Core/Src/main.c **** hcan.Init.AutoBusOff = DISABLE; 171 .loc 1 180 31 is_stmt 0 view .LVU43 172 0016 0376 strb r3, [r0, #24] 181:Core/Src/main.c **** hcan.Init.AutoWakeUp = DISABLE; 173 .loc 1 181 3 is_stmt 1 view .LVU44 181:Core/Src/main.c **** hcan.Init.AutoWakeUp = DISABLE; 174 .loc 1 181 24 is_stmt 0 view .LVU45 175 0018 4376 strb r3, [r0, #25] 182:Core/Src/main.c **** hcan.Init.AutoRetransmission = DISABLE; 176 .loc 1 182 3 is_stmt 1 view .LVU46 182:Core/Src/main.c **** hcan.Init.AutoRetransmission = DISABLE; 177 .loc 1 182 24 is_stmt 0 view .LVU47 178 001a 8376 strb r3, [r0, #26] 183:Core/Src/main.c **** hcan.Init.ReceiveFifoLocked = DISABLE; 179 .loc 1 183 3 is_stmt 1 view .LVU48 183:Core/Src/main.c **** hcan.Init.ReceiveFifoLocked = DISABLE; 180 .loc 1 183 32 is_stmt 0 view .LVU49 181 001c C376 strb r3, [r0, #27] 184:Core/Src/main.c **** hcan.Init.TransmitFifoPriority = DISABLE; 182 .loc 1 184 3 is_stmt 1 view .LVU50 184:Core/Src/main.c **** hcan.Init.TransmitFifoPriority = DISABLE; 183 .loc 1 184 31 is_stmt 0 view .LVU51 184 001e 0377 strb r3, [r0, #28] 185:Core/Src/main.c **** if (HAL_CAN_Init(&hcan) != HAL_OK) 185 .loc 1 185 3 is_stmt 1 view .LVU52 185:Core/Src/main.c **** if (HAL_CAN_Init(&hcan) != HAL_OK) 186 .loc 1 185 34 is_stmt 0 view .LVU53 187 0020 4377 strb r3, [r0, #29] 186:Core/Src/main.c **** { 188 .loc 1 186 3 is_stmt 1 view .LVU54 186:Core/Src/main.c **** { 189 .loc 1 186 7 is_stmt 0 view .LVU55 190 0022 FFF7FEFF bl HAL_CAN_Init 191 .LVL2: 194:Core/Src/main.c **** 192 .loc 1 194 1 view .LVU56 193 0026 08BD pop {r3, pc} 194 .L8: 195 .align 2 196 .L7: 197 0028 00000000 .word hcan 198 002c 00640040 .word 1073767424 199 .cfi_endproc 200 .LFE67: 202 .section .text.SystemClock_Config,"ax",%progbits 203 .align 1 204 .global SystemClock_Config 205 .syntax unified 206 .thumb 207 .thumb_func 208 .fpu softvfp 210 SystemClock_Config: ARM GAS /tmp/ccZ9xwps.s page 9 211 .LFB66: 126:Core/Src/main.c **** RCC_OscInitTypeDef RCC_OscInitStruct = {0}; 212 .loc 1 126 1 is_stmt 1 view -0 213 .cfi_startproc 214 @ args = 0, pretend = 0, frame = 64 215 @ frame_needed = 0, uses_anonymous_args = 0 216 0000 70B5 push {r4, r5, r6, lr} 217 .LCFI4: 218 .cfi_def_cfa_offset 16 219 .cfi_offset 4, -16 220 .cfi_offset 5, -12 221 .cfi_offset 6, -8 222 .cfi_offset 14, -4 223 0002 90B0 sub sp, sp, #64 224 .LCFI5: 225 .cfi_def_cfa_offset 80 127:Core/Src/main.c **** RCC_ClkInitTypeDef RCC_ClkInitStruct = {0}; 226 .loc 1 127 3 view .LVU58 127:Core/Src/main.c **** RCC_ClkInitTypeDef RCC_ClkInitStruct = {0}; 227 .loc 1 127 22 is_stmt 0 view .LVU59 228 0004 0024 movs r4, #0 229 0006 0894 str r4, [sp, #32] 230 0008 0994 str r4, [sp, #36] 231 000a 0B94 str r4, [sp, #44] 232 000c 0C94 str r4, [sp, #48] 128:Core/Src/main.c **** 233 .loc 1 128 3 is_stmt 1 view .LVU60 128:Core/Src/main.c **** 234 .loc 1 128 22 is_stmt 0 view .LVU61 235 000e 0194 str r4, [sp, #4] 236 0010 0294 str r4, [sp, #8] 237 0012 0394 str r4, [sp, #12] 238 0014 0494 str r4, [sp, #16] 239 0016 0594 str r4, [sp, #20] 133:Core/Src/main.c **** RCC_OscInitStruct.HSEState = RCC_HSE_ON; 240 .loc 1 133 3 is_stmt 1 view .LVU62 133:Core/Src/main.c **** RCC_OscInitStruct.HSEState = RCC_HSE_ON; 241 .loc 1 133 36 is_stmt 0 view .LVU63 242 0018 0125 movs r5, #1 243 001a 0695 str r5, [sp, #24] 134:Core/Src/main.c **** RCC_OscInitStruct.HSEPredivValue = RCC_HSE_PREDIV_DIV1; 244 .loc 1 134 3 is_stmt 1 view .LVU64 134:Core/Src/main.c **** RCC_OscInitStruct.HSEPredivValue = RCC_HSE_PREDIV_DIV1; 245 .loc 1 134 30 is_stmt 0 view .LVU65 246 001c 4FF48033 mov r3, #65536 247 0020 0793 str r3, [sp, #28] 135:Core/Src/main.c **** RCC_OscInitStruct.HSIState = RCC_HSI_ON; 248 .loc 1 135 3 is_stmt 1 view .LVU66 136:Core/Src/main.c **** RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON; 249 .loc 1 136 3 view .LVU67 136:Core/Src/main.c **** RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON; 250 .loc 1 136 30 is_stmt 0 view .LVU68 251 0022 0A95 str r5, [sp, #40] 137:Core/Src/main.c **** RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE; 252 .loc 1 137 3 is_stmt 1 view .LVU69 137:Core/Src/main.c **** RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE; 253 .loc 1 137 34 is_stmt 0 view .LVU70 ARM GAS /tmp/ccZ9xwps.s page 10 254 0024 0226 movs r6, #2 255 0026 0D96 str r6, [sp, #52] 138:Core/Src/main.c **** RCC_OscInitStruct.PLL.PLLMUL = RCC_PLL_MUL9; 256 .loc 1 138 3 is_stmt 1 view .LVU71 138:Core/Src/main.c **** RCC_OscInitStruct.PLL.PLLMUL = RCC_PLL_MUL9; 257 .loc 1 138 35 is_stmt 0 view .LVU72 258 0028 0E93 str r3, [sp, #56] 139:Core/Src/main.c **** if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) 259 .loc 1 139 3 is_stmt 1 view .LVU73 139:Core/Src/main.c **** if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) 260 .loc 1 139 32 is_stmt 0 view .LVU74 261 002a 4FF4E013 mov r3, #1835008 262 002e 0F93 str r3, [sp, #60] 140:Core/Src/main.c **** { 263 .loc 1 140 3 is_stmt 1 view .LVU75 140:Core/Src/main.c **** { 264 .loc 1 140 7 is_stmt 0 view .LVU76 265 0030 06A8 add r0, sp, #24 266 0032 FFF7FEFF bl HAL_RCC_OscConfig 267 .LVL3: 146:Core/Src/main.c **** |RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2; 268 .loc 1 146 3 is_stmt 1 view .LVU77 146:Core/Src/main.c **** |RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2; 269 .loc 1 146 31 is_stmt 0 view .LVU78 270 0036 0F23 movs r3, #15 271 0038 0193 str r3, [sp, #4] 148:Core/Src/main.c **** RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1; 272 .loc 1 148 3 is_stmt 1 view .LVU79 148:Core/Src/main.c **** RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1; 273 .loc 1 148 34 is_stmt 0 view .LVU80 274 003a 0296 str r6, [sp, #8] 149:Core/Src/main.c **** RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1; 275 .loc 1 149 3 is_stmt 1 view .LVU81 149:Core/Src/main.c **** RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1; 276 .loc 1 149 35 is_stmt 0 view .LVU82 277 003c 0394 str r4, [sp, #12] 150:Core/Src/main.c **** RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1; 278 .loc 1 150 3 is_stmt 1 view .LVU83 150:Core/Src/main.c **** RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1; 279 .loc 1 150 36 is_stmt 0 view .LVU84 280 003e 0494 str r4, [sp, #16] 151:Core/Src/main.c **** 281 .loc 1 151 3 is_stmt 1 view .LVU85 151:Core/Src/main.c **** 282 .loc 1 151 36 is_stmt 0 view .LVU86 283 0040 0594 str r4, [sp, #20] 153:Core/Src/main.c **** { 284 .loc 1 153 3 is_stmt 1 view .LVU87 153:Core/Src/main.c **** { 285 .loc 1 153 7 is_stmt 0 view .LVU88 286 0042 2946 mov r1, r5 287 0044 01A8 add r0, sp, #4 288 0046 FFF7FEFF bl HAL_RCC_ClockConfig 289 .LVL4: 157:Core/Src/main.c **** 290 .loc 1 157 1 view .LVU89 291 004a 10B0 add sp, sp, #64 ARM GAS /tmp/ccZ9xwps.s page 11 292 .LCFI6: 293 .cfi_def_cfa_offset 16 294 @ sp needed 295 004c 70BD pop {r4, r5, r6, pc} 296 .cfi_endproc 297 .LFE66: 299 .section .text.main,"ax",%progbits 300 .align 1 301 .global main 302 .syntax unified 303 .thumb 304 .thumb_func 305 .fpu softvfp 307 main: 308 .LFB65: 72:Core/Src/main.c **** /* USER CODE BEGIN 1 */ 309 .loc 1 72 1 is_stmt 1 view -0 310 .cfi_startproc 311 @ Volatile: function does not return. 312 @ args = 0, pretend = 0, frame = 0 313 @ frame_needed = 0, uses_anonymous_args = 0 314 0000 08B5 push {r3, lr} 315 .LCFI7: 316 .cfi_def_cfa_offset 8 317 .cfi_offset 3, -8 318 .cfi_offset 14, -4 80:Core/Src/main.c **** 319 .loc 1 80 3 view .LVU91 320 0002 FFF7FEFF bl HAL_Init 321 .LVL5: 87:Core/Src/main.c **** 322 .loc 1 87 3 view .LVU92 323 0006 FFF7FEFF bl SystemClock_Config 324 .LVL6: 94:Core/Src/main.c **** MX_CAN_Init(); 325 .loc 1 94 3 view .LVU93 326 000a FFF7FEFF bl MX_GPIO_Init 327 .LVL7: 95:Core/Src/main.c **** /* USER CODE BEGIN 2 */ 328 .loc 1 95 3 view .LVU94 329 000e FFF7FEFF bl MX_CAN_Init 330 .LVL8: 98:Core/Src/main.c **** 331 .loc 1 98 3 view .LVU95 98:Core/Src/main.c **** 332 .loc 1 98 14 is_stmt 0 view .LVU96 333 0012 0C4B ldr r3, .L14 334 0014 DA68 ldr r2, [r3, #12] 335 0016 0022 movs r2, #0 336 0018 DA60 str r2, [r3, #12] 337 .L12: 104:Core/Src/main.c **** { 338 .loc 1 104 3 is_stmt 1 discriminator 1 view .LVU97 110:Core/Src/main.c **** // First apply Power to give the slave device time to init 339 .loc 1 110 5 discriminator 1 view .LVU98 110:Core/Src/main.c **** // First apply Power to give the slave device time to init 340 .loc 1 110 16 is_stmt 0 discriminator 1 view .LVU99 ARM GAS /tmp/ccZ9xwps.s page 12 341 001a 0A4C ldr r4, .L14 342 001c E368 ldr r3, [r4, #12] 343 001e 83F00103 eor r3, r3, #1 344 0022 E360 str r3, [r4, #12] 112:Core/Src/main.c **** GPIOA->ODR ^= PIN_USB_S; 345 .loc 1 112 5 is_stmt 1 discriminator 1 view .LVU100 346 0024 C820 movs r0, #200 347 0026 FFF7FEFF bl HAL_Delay 348 .LVL9: 112:Core/Src/main.c **** GPIOA->ODR ^= PIN_USB_S; 349 .loc 1 112 20 discriminator 1 view .LVU101 113:Core/Src/main.c **** GPIOA->ODR ^= PIN_USER_LED; 350 .loc 1 113 5 discriminator 1 view .LVU102 113:Core/Src/main.c **** GPIOA->ODR ^= PIN_USER_LED; 351 .loc 1 113 16 is_stmt 0 discriminator 1 view .LVU103 352 002a E368 ldr r3, [r4, #12] 353 002c 83F00803 eor r3, r3, #8 354 0030 E360 str r3, [r4, #12] 114:Core/Src/main.c **** 355 .loc 1 114 5 is_stmt 1 discriminator 1 view .LVU104 114:Core/Src/main.c **** 356 .loc 1 114 16 is_stmt 0 discriminator 1 view .LVU105 357 0032 E368 ldr r3, [r4, #12] 358 0034 83F01003 eor r3, r3, #16 359 0038 E360 str r3, [r4, #12] 116:Core/Src/main.c **** } 360 .loc 1 116 5 is_stmt 1 discriminator 1 view .LVU106 361 003a 42F21070 movw r0, #10000 362 003e FFF7FEFF bl HAL_Delay 363 .LVL10: 364 0042 EAE7 b .L12 365 .L15: 366 .align 2 367 .L14: 368 0044 00080140 .word 1073809408 369 .cfi_endproc 370 .LFE65: 372 .section .text.Error_Handler,"ax",%progbits 373 .align 1 374 .global Error_Handler 375 .syntax unified 376 .thumb 377 .thumb_func 378 .fpu softvfp 380 Error_Handler: 381 .LFB69: 224:Core/Src/main.c **** 225:Core/Src/main.c **** /* USER CODE BEGIN 4 */ 226:Core/Src/main.c **** 227:Core/Src/main.c **** /* USER CODE END 4 */ 228:Core/Src/main.c **** 229:Core/Src/main.c **** /** 230:Core/Src/main.c **** * @brief This function is executed in case of error occurrence. 231:Core/Src/main.c **** * @retval None 232:Core/Src/main.c **** */ 233:Core/Src/main.c **** void Error_Handler(void) 234:Core/Src/main.c **** { ARM GAS /tmp/ccZ9xwps.s page 13 382 .loc 1 234 1 view -0 383 .cfi_startproc 384 @ args = 0, pretend = 0, frame = 0 385 @ frame_needed = 0, uses_anonymous_args = 0 386 @ link register save eliminated. 235:Core/Src/main.c **** /* USER CODE BEGIN Error_Handler_Debug */ 236:Core/Src/main.c **** /* User can add his own implementation to report the HAL error return state */ 237:Core/Src/main.c **** 238:Core/Src/main.c **** /* USER CODE END Error_Handler_Debug */ 239:Core/Src/main.c **** } 387 .loc 1 239 1 view .LVU108 388 0000 7047 bx lr 389 .cfi_endproc 390 .LFE69: 392 .comm hcan,40,4 393 .text 394 .Letext0: 395 .file 2 "/usr/arm-none-eabi/include/machine/_default_types.h" 396 .file 3 "/usr/arm-none-eabi/include/sys/_stdint.h" 397 .file 4 "Drivers/CMSIS/Include/core_cm3.h" 398 .file 5 "Drivers/CMSIS/Device/ST/STM32F1xx/Include/system_stm32f1xx.h" 399 .file 6 "Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f103xb.h" 400 .file 7 "Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f1xx.h" 401 .file 8 "Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_def.h" 402 .file 9 "Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_rcc.h" 403 .file 10 "Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_rcc_ex.h" 404 .file 11 "Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_gpio.h" 405 .file 12 "Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_can.h" 406 .file 13 "Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal.h" ARM GAS /tmp/ccZ9xwps.s page 14 DEFINED SYMBOLS *ABS*:0000000000000000 main.c /tmp/ccZ9xwps.s:16 .text.MX_GPIO_Init:0000000000000000 $t /tmp/ccZ9xwps.s:23 .text.MX_GPIO_Init:0000000000000000 MX_GPIO_Init /tmp/ccZ9xwps.s:125 .text.MX_GPIO_Init:000000000000006c $d /tmp/ccZ9xwps.s:131 .text.MX_CAN_Init:0000000000000000 $t /tmp/ccZ9xwps.s:137 .text.MX_CAN_Init:0000000000000000 MX_CAN_Init /tmp/ccZ9xwps.s:197 .text.MX_CAN_Init:0000000000000028 $d *COM*:0000000000000028 hcan /tmp/ccZ9xwps.s:203 .text.SystemClock_Config:0000000000000000 $t /tmp/ccZ9xwps.s:210 .text.SystemClock_Config:0000000000000000 SystemClock_Config /tmp/ccZ9xwps.s:300 .text.main:0000000000000000 $t /tmp/ccZ9xwps.s:307 .text.main:0000000000000000 main /tmp/ccZ9xwps.s:368 .text.main:0000000000000044 $d /tmp/ccZ9xwps.s:373 .text.Error_Handler:0000000000000000 $t /tmp/ccZ9xwps.s:380 .text.Error_Handler:0000000000000000 Error_Handler UNDEFINED SYMBOLS HAL_GPIO_WritePin HAL_GPIO_Init HAL_CAN_Init HAL_RCC_OscConfig HAL_RCC_ClockConfig HAL_Init HAL_Delay