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usb_switcher/rusci-firmware/build/stm32f1xx_hal_gpio.lst
Moritz Martinius 66bea6372f Demo blink sketch for first test
2020-11-07 12:48:40 +01:00

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ARM GAS /tmp/ccCnQmqA.s page 1
1 .cpu cortex-m3
2 .eabi_attribute 20, 1
3 .eabi_attribute 21, 1
4 .eabi_attribute 23, 3
5 .eabi_attribute 24, 1
6 .eabi_attribute 25, 1
7 .eabi_attribute 26, 1
8 .eabi_attribute 30, 1
9 .eabi_attribute 34, 1
10 .eabi_attribute 18, 4
11 .file "stm32f1xx_hal_gpio.c"
12 .text
13 .Ltext0:
14 .cfi_sections .debug_frame
15 .section .text.HAL_GPIO_Init,"ax",%progbits
16 .align 1
17 .global HAL_GPIO_Init
18 .arch armv7-m
19 .syntax unified
20 .thumb
21 .thumb_func
22 .fpu softvfp
24 HAL_GPIO_Init:
25 .LVL0:
26 .LFB65:
27 .file 1 "Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c"
1:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** /**
2:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** ******************************************************************************
3:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** * @file stm32f1xx_hal_gpio.c
4:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** * @author MCD Application Team
5:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** * @brief GPIO HAL module driver.
6:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** * This file provides firmware functions to manage the following
7:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** * functionalities of the General Purpose Input/Output (GPIO) peripheral:
8:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** * + Initialization and de-initialization functions
9:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** * + IO operation functions
10:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** *
11:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** @verbatim
12:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** ==============================================================================
13:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** ##### GPIO Peripheral features #####
14:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** ==============================================================================
15:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** [..]
16:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** Subject to the specific hardware characteristics of each I/O port listed in the datasheet, each
17:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** port bit of the General Purpose IO (GPIO) Ports, can be individually configured by software
18:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** in several modes:
19:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** (+) Input mode
20:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** (+) Analog mode
21:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** (+) Output mode
22:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** (+) Alternate function mode
23:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** (+) External interrupt/event lines
24:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c ****
25:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** [..]
26:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** During and just after reset, the alternate functions and external interrupt
27:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** lines are not active and the I/O ports are configured in input floating mode.
28:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c ****
29:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** [..]
30:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** All GPIO pins have weak internal pull-up and pull-down resistors, which can be
31:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** activated or not.
ARM GAS /tmp/ccCnQmqA.s page 2
32:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c ****
33:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** [..]
34:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** In Output or Alternate mode, each IO can be configured on open-drain or push-pull
35:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** type and the IO speed can be selected depending on the VDD value.
36:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c ****
37:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** [..]
38:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** All ports have external interrupt/event capability. To use external interrupt
39:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** lines, the port must be configured in input mode. All available GPIO pins are
40:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** connected to the 16 external interrupt/event lines from EXTI0 to EXTI15.
41:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c ****
42:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** [..]
43:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** The external interrupt/event controller consists of up to 20 edge detectors in connectivity
44:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** line devices, or 19 edge detectors in other devices for generating event/interrupt requests.
45:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** Each input line can be independently configured to select the type (event or interrupt) and
46:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** the corresponding trigger event (rising or falling or both). Each line can also masked
47:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** independently. A pending register maintains the status line of the interrupt requests
48:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c ****
49:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** ##### How to use this driver #####
50:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** ==============================================================================
51:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** [..]
52:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** (#) Enable the GPIO APB2 clock using the following function : __HAL_RCC_GPIOx_CLK_ENABLE().
53:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c ****
54:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** (#) Configure the GPIO pin(s) using HAL_GPIO_Init().
55:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** (++) Configure the IO mode using "Mode" member from GPIO_InitTypeDef structure
56:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** (++) Activate Pull-up, Pull-down resistor using "Pull" member from GPIO_InitTypeDef
57:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** structure.
58:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** (++) In case of Output or alternate function mode selection: the speed is
59:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** configured through "Speed" member from GPIO_InitTypeDef structure
60:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** (++) Analog mode is required when a pin is to be used as ADC channel
61:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** or DAC output.
62:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** (++) In case of external interrupt/event selection the "Mode" member from
63:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** GPIO_InitTypeDef structure select the type (interrupt or event) and
64:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** the corresponding trigger event (rising or falling or both).
65:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c ****
66:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** (#) In case of external interrupt/event mode selection, configure NVIC IRQ priority
67:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** mapped to the EXTI line using HAL_NVIC_SetPriority() and enable it using
68:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** HAL_NVIC_EnableIRQ().
69:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c ****
70:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** (#) To get the level of a pin configured in input mode use HAL_GPIO_ReadPin().
71:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c ****
72:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** (#) To set/reset the level of a pin configured in output mode use
73:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** HAL_GPIO_WritePin()/HAL_GPIO_TogglePin().
74:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c ****
75:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** (#) To lock pin configuration until next reset use HAL_GPIO_LockPin().
76:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c ****
77:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** (#) During and just after reset, the alternate functions are not
78:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** active and the GPIO pins are configured in input floating mode (except JTAG
79:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** pins).
80:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c ****
81:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** (#) The LSE oscillator pins OSC32_IN and OSC32_OUT can be used as general purpose
82:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** (PC14 and PC15, respectively) when the LSE oscillator is off. The LSE has
83:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** priority over the GPIO function.
84:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c ****
85:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** (#) The HSE oscillator pins OSC_IN/OSC_OUT can be used as
86:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** general purpose PD0 and PD1, respectively, when the HSE oscillator is off.
87:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** The HSE has priority over the GPIO function.
88:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c ****
ARM GAS /tmp/ccCnQmqA.s page 3
89:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** @endverbatim
90:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** ******************************************************************************
91:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** * @attention
92:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** *
93:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** * <h2><center>&copy; Copyright (c) 2016 STMicroelectronics.
94:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** * All rights reserved.</center></h2>
95:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** *
96:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** * This software component is licensed by ST under BSD 3-Clause license,
97:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** * the "License"; You may not use this file except in compliance with the
98:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** * License. You may obtain a copy of the License at:
99:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** * opensource.org/licenses/BSD-3-Clause
100:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** *
101:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** ******************************************************************************
102:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** */
103:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c ****
104:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** /* Includes ------------------------------------------------------------------*/
105:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** #include "stm32f1xx_hal.h"
106:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c ****
107:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** /** @addtogroup STM32F1xx_HAL_Driver
108:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** * @{
109:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** */
110:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c ****
111:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** /** @defgroup GPIO GPIO
112:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** * @brief GPIO HAL module driver
113:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** * @{
114:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** */
115:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c ****
116:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** #ifdef HAL_GPIO_MODULE_ENABLED
117:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c ****
118:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** /* Private typedef -----------------------------------------------------------*/
119:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** /* Private define ------------------------------------------------------------*/
120:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** /** @addtogroup GPIO_Private_Constants GPIO Private Constants
121:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** * @{
122:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** */
123:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** #define GPIO_MODE 0x00000003u
124:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** #define EXTI_MODE 0x10000000u
125:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** #define GPIO_MODE_IT 0x00010000u
126:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** #define GPIO_MODE_EVT 0x00020000u
127:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** #define RISING_EDGE 0x00100000u
128:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** #define FALLING_EDGE 0x00200000u
129:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** #define GPIO_OUTPUT_TYPE 0x00000010u
130:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c ****
131:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** #define GPIO_NUMBER 16u
132:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c ****
133:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** /* Definitions for bit manipulation of CRL and CRH register */
134:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** #define GPIO_CR_MODE_INPUT 0x00000000u /*!< 00: Input mode (reset state) */
135:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** #define GPIO_CR_CNF_ANALOG 0x00000000u /*!< 00: Analog mode */
136:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** #define GPIO_CR_CNF_INPUT_FLOATING 0x00000004u /*!< 01: Floating input (reset state) */
137:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** #define GPIO_CR_CNF_INPUT_PU_PD 0x00000008u /*!< 10: Input with pull-up / pull-down */
138:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** #define GPIO_CR_CNF_GP_OUTPUT_PP 0x00000000u /*!< 00: General purpose output push-pull */
139:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** #define GPIO_CR_CNF_GP_OUTPUT_OD 0x00000004u /*!< 01: General purpose output Open-drain */
140:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** #define GPIO_CR_CNF_AF_OUTPUT_PP 0x00000008u /*!< 10: Alternate function output Push-pull */
141:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** #define GPIO_CR_CNF_AF_OUTPUT_OD 0x0000000Cu /*!< 11: Alternate function output Open-drain */
142:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c ****
143:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** /**
144:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** * @}
145:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** */
ARM GAS /tmp/ccCnQmqA.s page 4
146:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** /* Private macro -------------------------------------------------------------*/
147:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** /* Private variables ---------------------------------------------------------*/
148:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** /* Private function prototypes -----------------------------------------------*/
149:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** /* Private functions ---------------------------------------------------------*/
150:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** /* Exported functions --------------------------------------------------------*/
151:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** /** @defgroup GPIO_Exported_Functions GPIO Exported Functions
152:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** * @{
153:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** */
154:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c ****
155:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** /** @defgroup GPIO_Exported_Functions_Group1 Initialization and de-initialization functions
156:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** * @brief Initialization and Configuration functions
157:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** *
158:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** @verbatim
159:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** ===============================================================================
160:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** ##### Initialization and de-initialization functions #####
161:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** ===============================================================================
162:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** [..]
163:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** This section provides functions allowing to initialize and de-initialize the GPIOs
164:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** to be ready for use.
165:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c ****
166:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** @endverbatim
167:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** * @{
168:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** */
169:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c ****
170:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c ****
171:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** /**
172:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** * @brief Initializes the GPIOx peripheral according to the specified parameters in the GPIO_Init
173:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** * @param GPIOx: where x can be (A..G depending on device used) to select the GPIO peripheral
174:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** * @param GPIO_Init: pointer to a GPIO_InitTypeDef structure that contains
175:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** * the configuration information for the specified GPIO peripheral.
176:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** * @retval None
177:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** */
178:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** void HAL_GPIO_Init(GPIO_TypeDef *GPIOx, GPIO_InitTypeDef *GPIO_Init)
179:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** {
28 .loc 1 179 1 view -0
29 .cfi_startproc
30 @ args = 0, pretend = 0, frame = 8
31 @ frame_needed = 0, uses_anonymous_args = 0
32 @ link register save eliminated.
33 .loc 1 179 1 is_stmt 0 view .LVU1
34 0000 F0B4 push {r4, r5, r6, r7}
35 .LCFI0:
36 .cfi_def_cfa_offset 16
37 .cfi_offset 4, -16
38 .cfi_offset 5, -12
39 .cfi_offset 6, -8
40 .cfi_offset 7, -4
41 0002 82B0 sub sp, sp, #8
42 .LCFI1:
43 .cfi_def_cfa_offset 24
180:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** uint32_t position = 0x00u;
44 .loc 1 180 3 is_stmt 1 view .LVU2
45 .LVL1:
181:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** uint32_t ioposition;
46 .loc 1 181 3 view .LVU3
182:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** uint32_t iocurrent;
47 .loc 1 182 3 view .LVU4
ARM GAS /tmp/ccCnQmqA.s page 5
183:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** uint32_t temp;
48 .loc 1 183 3 view .LVU5
184:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** uint32_t config = 0x00u;
49 .loc 1 184 3 view .LVU6
185:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** __IO uint32_t *configregister; /* Store the address of CRL or CRH register based on pin number */
50 .loc 1 185 3 view .LVU7
186:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** uint32_t registeroffset; /* offset used during computation of CNF and MODE bits placement i
51 .loc 1 186 3 view .LVU8
187:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c ****
188:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** /* Check the parameters */
189:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** assert_param(IS_GPIO_ALL_INSTANCE(GPIOx));
52 .loc 1 189 3 view .LVU9
190:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** assert_param(IS_GPIO_PIN(GPIO_Init->Pin));
53 .loc 1 190 3 view .LVU10
191:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** assert_param(IS_GPIO_MODE(GPIO_Init->Mode));
54 .loc 1 191 3 view .LVU11
192:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c ****
193:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** /* Configure the port pins */
194:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** while (((GPIO_Init->Pin) >> position) != 0x00u)
55 .loc 1 194 3 view .LVU12
184:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** __IO uint32_t *configregister; /* Store the address of CRL or CRH register based on pin number */
56 .loc 1 184 12 is_stmt 0 view .LVU13
57 0004 0026 movs r6, #0
180:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** uint32_t ioposition;
58 .loc 1 180 12 view .LVU14
59 0006 3546 mov r5, r6
60 .loc 1 194 9 view .LVU15
61 0008 A0E0 b .L2
62 .LVL2:
63 .L38:
195:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** {
196:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** /* Get the IO position */
197:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** ioposition = (0x01uL << position);
198:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c ****
199:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** /* Get the current IO position */
200:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** iocurrent = (uint32_t)(GPIO_Init->Pin) & ioposition;
201:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c ****
202:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** if (iocurrent == ioposition)
203:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** {
204:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** /* Check the Alternate function parameters */
205:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** assert_param(IS_GPIO_AF_INSTANCE(GPIOx));
206:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c ****
207:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** /* Based on the required mode, filling config variable with MODEy[1:0] and CNFy[3:2] correspo
208:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** switch (GPIO_Init->Mode)
64 .loc 1 208 7 view .LVU16
65 000a 002A cmp r2, #0
66 000c 58D0 beq .L8
67 000e 012A cmp r2, #1
68 0010 10D1 bne .L10
209:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** {
210:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** /* If we are configuring the pin in OUTPUT push-pull mode */
211:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** case GPIO_MODE_OUTPUT_PP:
212:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** /* Check the GPIO speed parameter */
213:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** assert_param(IS_GPIO_SPEED(GPIO_Init->Speed));
69 .loc 1 213 11 is_stmt 1 view .LVU17
214:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** config = GPIO_Init->Speed + GPIO_CR_CNF_GP_OUTPUT_PP;
70 .loc 1 214 11 view .LVU18
ARM GAS /tmp/ccCnQmqA.s page 6
71 .loc 1 214 18 is_stmt 0 view .LVU19
72 0012 CE68 ldr r6, [r1, #12]
73 .LVL3:
215:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** break;
74 .loc 1 215 11 is_stmt 1 view .LVU20
75 0014 0EE0 b .L10
76 .L5:
208:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** {
77 .loc 1 208 7 is_stmt 0 view .LVU21
78 0016 6A4F ldr r7, .L39
79 0018 BA42 cmp r2, r7
80 001a 51D0 beq .L8
81 001c 48D9 bls .L34
82 001e 694F ldr r7, .L39+4
83 0020 BA42 cmp r2, r7
84 0022 4DD0 beq .L8
85 0024 07F58037 add r7, r7, #65536
86 0028 BA42 cmp r2, r7
87 002a 49D0 beq .L8
88 002c A7F58017 sub r7, r7, #1048576
89 0030 BA42 cmp r2, r7
90 0032 45D0 beq .L8
91 .LVL4:
92 .L10:
216:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c ****
217:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** /* If we are configuring the pin in OUTPUT open-drain mode */
218:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** case GPIO_MODE_OUTPUT_OD:
219:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** /* Check the GPIO speed parameter */
220:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** assert_param(IS_GPIO_SPEED(GPIO_Init->Speed));
221:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** config = GPIO_Init->Speed + GPIO_CR_CNF_GP_OUTPUT_OD;
222:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** break;
223:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c ****
224:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** /* If we are configuring the pin in ALTERNATE FUNCTION push-pull mode */
225:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** case GPIO_MODE_AF_PP:
226:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** /* Check the GPIO speed parameter */
227:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** assert_param(IS_GPIO_SPEED(GPIO_Init->Speed));
228:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** config = GPIO_Init->Speed + GPIO_CR_CNF_AF_OUTPUT_PP;
229:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** break;
230:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c ****
231:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** /* If we are configuring the pin in ALTERNATE FUNCTION open-drain mode */
232:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** case GPIO_MODE_AF_OD:
233:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** /* Check the GPIO speed parameter */
234:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** assert_param(IS_GPIO_SPEED(GPIO_Init->Speed));
235:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** config = GPIO_Init->Speed + GPIO_CR_CNF_AF_OUTPUT_OD;
236:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** break;
237:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c ****
238:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** /* If we are configuring the pin in INPUT (also applicable to EVENT and IT mode) */
239:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** case GPIO_MODE_INPUT:
240:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** case GPIO_MODE_IT_RISING:
241:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** case GPIO_MODE_IT_FALLING:
242:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** case GPIO_MODE_IT_RISING_FALLING:
243:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** case GPIO_MODE_EVT_RISING:
244:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** case GPIO_MODE_EVT_FALLING:
245:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** case GPIO_MODE_EVT_RISING_FALLING:
246:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** /* Check the GPIO pull parameter */
247:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** assert_param(IS_GPIO_PULL(GPIO_Init->Pull));
248:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** if (GPIO_Init->Pull == GPIO_NOPULL)
ARM GAS /tmp/ccCnQmqA.s page 7
249:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** {
250:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** config = GPIO_CR_MODE_INPUT + GPIO_CR_CNF_INPUT_FLOATING;
251:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** }
252:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** else if (GPIO_Init->Pull == GPIO_PULLUP)
253:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** {
254:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** config = GPIO_CR_MODE_INPUT + GPIO_CR_CNF_INPUT_PU_PD;
255:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c ****
256:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** /* Set the corresponding ODR bit */
257:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** GPIOx->BSRR = ioposition;
258:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** }
259:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** else /* GPIO_PULLDOWN */
260:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** {
261:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** config = GPIO_CR_MODE_INPUT + GPIO_CR_CNF_INPUT_PU_PD;
262:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c ****
263:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** /* Reset the corresponding ODR bit */
264:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** GPIOx->BRR = ioposition;
265:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** }
266:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** break;
267:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c ****
268:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** /* If we are configuring the pin in INPUT analog mode */
269:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** case GPIO_MODE_ANALOG:
270:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** config = GPIO_CR_MODE_INPUT + GPIO_CR_CNF_ANALOG;
271:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** break;
272:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c ****
273:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** /* Parameters are checked with assert_param */
274:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** default:
275:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** break;
276:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** }
277:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c ****
278:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** /* Check if the current bit belongs to first half or last half of the pin count number
279:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** in order to address CRH or CRL register*/
280:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** configregister = (iocurrent < GPIO_PIN_8) ? &GPIOx->CRL : &GPIOx->CRH;
93 .loc 1 280 7 is_stmt 1 view .LVU22
94 .loc 1 280 67 is_stmt 0 view .LVU23
95 0034 FF2B cmp r3, #255
96 0036 57D8 bhi .L14
97 .loc 1 280 67 discriminator 1 view .LVU24
98 0038 8446 mov ip, r0
99 .L15:
100 .LVL5:
281:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** registeroffset = (iocurrent < GPIO_PIN_8) ? (position << 2u) : ((position - 8u) << 2u);
101 .loc 1 281 7 is_stmt 1 discriminator 4 view .LVU25
102 .loc 1 281 68 is_stmt 0 discriminator 4 view .LVU26
103 003a FF2B cmp r3, #255
104 003c 57D8 bhi .L16
105 .loc 1 281 68 discriminator 1 view .LVU27
106 003e AC00 lsls r4, r5, #2
107 .LVL6:
108 .L17:
282:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c ****
283:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** /* Apply the new configuration of the pin to the register */
284:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** MODIFY_REG((*configregister), ((GPIO_CRL_MODE0 | GPIO_CRL_CNF0) << registeroffset), (config <
109 .loc 1 284 7 is_stmt 1 discriminator 4 view .LVU28
110 0040 DCF80020 ldr r2, [ip]
111 0044 0F27 movs r7, #15
112 0046 A740 lsls r7, r7, r4
113 0048 22EA0702 bic r2, r2, r7
ARM GAS /tmp/ccCnQmqA.s page 8
114 004c 06FA04F4 lsl r4, r6, r4
115 .LVL7:
116 .loc 1 284 7 is_stmt 0 discriminator 4 view .LVU29
117 0050 2243 orrs r2, r2, r4
118 0052 CCF80020 str r2, [ip]
285:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c ****
286:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** /*--------------------- EXTI Mode Configuration ------------------------*/
287:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** /* Configure the External Interrupt or event for the current IO */
288:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** if ((GPIO_Init->Mode & EXTI_MODE) == EXTI_MODE)
119 .loc 1 288 7 is_stmt 1 discriminator 4 view .LVU30
120 .loc 1 288 21 is_stmt 0 discriminator 4 view .LVU31
121 0056 4A68 ldr r2, [r1, #4]
122 .loc 1 288 10 discriminator 4 view .LVU32
123 0058 12F0805F tst r2, #268435456
124 005c 75D0 beq .L3
289:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** {
290:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** /* Enable AFIO Clock */
291:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** __HAL_RCC_AFIO_CLK_ENABLE();
125 .loc 1 291 9 is_stmt 1 view .LVU33
126 .LBB2:
127 .loc 1 291 9 view .LVU34
128 .loc 1 291 9 view .LVU35
129 005e 5A4A ldr r2, .L39+8
130 0060 9469 ldr r4, [r2, #24]
131 0062 44F00104 orr r4, r4, #1
132 0066 9461 str r4, [r2, #24]
133 .loc 1 291 9 view .LVU36
134 0068 9269 ldr r2, [r2, #24]
135 006a 02F00102 and r2, r2, #1
136 006e 0192 str r2, [sp, #4]
137 .loc 1 291 9 view .LVU37
138 0070 019A ldr r2, [sp, #4]
139 .LBE2:
292:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** temp = AFIO->EXTICR[position >> 2u];
140 .loc 1 292 9 view .LVU38
141 .loc 1 292 38 is_stmt 0 view .LVU39
142 0072 AC08 lsrs r4, r5, #2
143 .loc 1 292 14 view .LVU40
144 0074 A71C adds r7, r4, #2
145 0076 554A ldr r2, .L39+12
146 0078 52F82720 ldr r2, [r2, r7, lsl #2]
147 .LVL8:
293:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** CLEAR_BIT(temp, (0x0Fu) << (4u * (position & 0x03u)));
148 .loc 1 293 9 is_stmt 1 view .LVU41
149 007c 05F00307 and r7, r5, #3
150 0080 BF00 lsls r7, r7, #2
151 0082 4FF00F0C mov ip, #15
152 .LVL9:
153 .loc 1 293 9 is_stmt 0 view .LVU42
154 0086 0CFA07FC lsl ip, ip, r7
155 008a 22EA0C0C bic ip, r2, ip
156 .LVL10:
294:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** SET_BIT(temp, (GPIO_GET_INDEX(GPIOx)) << (4u * (position & 0x03u)));
157 .loc 1 294 9 is_stmt 1 view .LVU43
158 008e 504A ldr r2, .L39+16
159 0090 9042 cmp r0, r2
160 0092 32D0 beq .L29
ARM GAS /tmp/ccCnQmqA.s page 9
161 .loc 1 294 9 is_stmt 0 discriminator 1 view .LVU44
162 0094 02F58062 add r2, r2, #1024
163 0098 9042 cmp r0, r2
164 009a 71D0 beq .L30
165 .loc 1 294 9 discriminator 3 view .LVU45
166 009c 02F58062 add r2, r2, #1024
167 00a0 9042 cmp r0, r2
168 00a2 6FD0 beq .L31
169 .loc 1 294 9 discriminator 5 view .LVU46
170 00a4 02F58062 add r2, r2, #1024
171 00a8 9042 cmp r0, r2
172 00aa 24D0 beq .L35
173 .loc 1 294 9 view .LVU47
174 00ac 0422 movs r2, #4
175 00ae 25E0 b .L18
176 .LVL11:
177 .L34:
208:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** {
178 .loc 1 208 7 view .LVU48
179 00b0 A7F58017 sub r7, r7, #1048576
180 00b4 BA42 cmp r2, r7
181 00b6 03D0 beq .L8
182 00b8 07F58037 add r7, r7, #65536
183 00bc BA42 cmp r2, r7
184 00be B9D1 bne .L10
185 .L8:
247:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** if (GPIO_Init->Pull == GPIO_NOPULL)
186 .loc 1 247 11 is_stmt 1 view .LVU49
248:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** {
187 .loc 1 248 11 view .LVU50
248:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** {
188 .loc 1 248 24 is_stmt 0 view .LVU51
189 00c0 8A68 ldr r2, [r1, #8]
248:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** {
190 .loc 1 248 14 view .LVU52
191 00c2 7AB1 cbz r2, .L28
252:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** {
192 .loc 1 252 16 is_stmt 1 view .LVU53
252:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** {
193 .loc 1 252 19 is_stmt 0 view .LVU54
194 00c4 012A cmp r2, #1
195 00c6 08D0 beq .L36
261:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c ****
196 .loc 1 261 13 is_stmt 1 view .LVU55
197 .LVL12:
264:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** }
198 .loc 1 264 13 view .LVU56
264:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** }
199 .loc 1 264 24 is_stmt 0 view .LVU57
200 00c8 4461 str r4, [r0, #20]
261:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c ****
201 .loc 1 261 20 view .LVU58
202 00ca 0826 movs r6, #8
203 00cc B2E7 b .L10
204 .LVL13:
205 .L6:
227:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** config = GPIO_Init->Speed + GPIO_CR_CNF_AF_OUTPUT_PP;
ARM GAS /tmp/ccCnQmqA.s page 10
206 .loc 1 227 11 is_stmt 1 view .LVU59
228:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** break;
207 .loc 1 228 11 view .LVU60
228:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** break;
208 .loc 1 228 29 is_stmt 0 view .LVU61
209 00ce CE68 ldr r6, [r1, #12]
210 .LVL14:
228:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** break;
211 .loc 1 228 18 view .LVU62
212 00d0 0836 adds r6, r6, #8
213 .LVL15:
229:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c ****
214 .loc 1 229 11 is_stmt 1 view .LVU63
215 00d2 AFE7 b .L10
216 .L4:
234:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** config = GPIO_Init->Speed + GPIO_CR_CNF_AF_OUTPUT_OD;
217 .loc 1 234 11 view .LVU64
235:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** break;
218 .loc 1 235 11 view .LVU65
235:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** break;
219 .loc 1 235 29 is_stmt 0 view .LVU66
220 00d4 CE68 ldr r6, [r1, #12]
221 .LVL16:
235:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** break;
222 .loc 1 235 18 view .LVU67
223 00d6 0C36 adds r6, r6, #12
224 .LVL17:
236:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c ****
225 .loc 1 236 11 is_stmt 1 view .LVU68
226 00d8 ACE7 b .L10
227 .L36:
254:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c ****
228 .loc 1 254 13 view .LVU69
229 .LVL18:
257:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** }
230 .loc 1 257 13 view .LVU70
257:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** }
231 .loc 1 257 25 is_stmt 0 view .LVU71
232 00da 0461 str r4, [r0, #16]
254:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c ****
233 .loc 1 254 20 view .LVU72
234 00dc 0826 movs r6, #8
235 00de A9E7 b .L10
236 .LVL19:
237 .L27:
270:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** break;
238 .loc 1 270 18 view .LVU73
239 00e0 0026 movs r6, #0
240 .LVL20:
270:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** break;
241 .loc 1 270 18 view .LVU74
242 00e2 A7E7 b .L10
243 .LVL21:
244 .L28:
250:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** }
245 .loc 1 250 20 view .LVU75
246 00e4 0426 movs r6, #4
ARM GAS /tmp/ccCnQmqA.s page 11
247 .LVL22:
250:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** }
248 .loc 1 250 20 view .LVU76
249 00e6 A5E7 b .L10
250 .LVL23:
251 .L14:
280:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** registeroffset = (iocurrent < GPIO_PIN_8) ? (position << 2u) : ((position - 8u) << 2u);
252 .loc 1 280 67 discriminator 2 view .LVU77
253 00e8 00F1040C add ip, r0, #4
254 00ec A5E7 b .L15
255 .LVL24:
256 .L16:
281:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c ****
257 .loc 1 281 81 discriminator 2 view .LVU78
258 00ee A5F10804 sub r4, r5, #8
259 .LVL25:
281:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c ****
260 .loc 1 281 68 discriminator 2 view .LVU79
261 00f2 A400 lsls r4, r4, #2
262 00f4 A4E7 b .L17
263 .LVL26:
264 .L35:
265 .loc 1 294 9 view .LVU80
266 00f6 0322 movs r2, #3
267 00f8 00E0 b .L18
268 .L29:
269 00fa 0022 movs r2, #0
270 .L18:
271 .loc 1 294 9 discriminator 16 view .LVU81
272 00fc BA40 lsls r2, r2, r7
273 00fe 42EA0C02 orr r2, r2, ip
274 .LVL27:
295:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** AFIO->EXTICR[position >> 2u] = temp;
275 .loc 1 295 9 is_stmt 1 discriminator 16 view .LVU82
276 .loc 1 295 38 is_stmt 0 discriminator 16 view .LVU83
277 0102 0234 adds r4, r4, #2
278 0104 314F ldr r7, .L39+12
279 0106 47F82420 str r2, [r7, r4, lsl #2]
296:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c ****
297:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c ****
298:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** /* Configure the interrupt mask */
299:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** if ((GPIO_Init->Mode & GPIO_MODE_IT) == GPIO_MODE_IT)
280 .loc 1 299 9 is_stmt 1 discriminator 16 view .LVU84
281 .loc 1 299 23 is_stmt 0 discriminator 16 view .LVU85
282 010a 4A68 ldr r2, [r1, #4]
283 .LVL28:
284 .loc 1 299 12 discriminator 16 view .LVU86
285 010c 12F4803F tst r2, #65536
286 0110 3AD0 beq .L19
300:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** {
301:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** SET_BIT(EXTI->IMR, iocurrent);
287 .loc 1 301 11 is_stmt 1 view .LVU87
288 0112 304C ldr r4, .L39+20
289 .LVL29:
290 .loc 1 301 11 is_stmt 0 view .LVU88
291 0114 2268 ldr r2, [r4]
292 0116 1A43 orrs r2, r2, r3
ARM GAS /tmp/ccCnQmqA.s page 12
293 0118 2260 str r2, [r4]
294 .LVL30:
295 .L20:
302:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** }
303:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** else
304:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** {
305:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** CLEAR_BIT(EXTI->IMR, iocurrent);
306:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** }
307:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c ****
308:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** /* Configure the event mask */
309:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** if ((GPIO_Init->Mode & GPIO_MODE_EVT) == GPIO_MODE_EVT)
296 .loc 1 309 9 is_stmt 1 view .LVU89
297 .loc 1 309 23 is_stmt 0 view .LVU90
298 011a 4A68 ldr r2, [r1, #4]
299 .loc 1 309 12 view .LVU91
300 011c 12F4003F tst r2, #131072
301 0120 38D0 beq .L21
310:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** {
311:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** SET_BIT(EXTI->EMR, iocurrent);
302 .loc 1 311 11 is_stmt 1 view .LVU92
303 0122 2C4C ldr r4, .L39+20
304 0124 6268 ldr r2, [r4, #4]
305 0126 1A43 orrs r2, r2, r3
306 0128 6260 str r2, [r4, #4]
307 .L22:
312:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** }
313:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** else
314:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** {
315:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** CLEAR_BIT(EXTI->EMR, iocurrent);
316:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** }
317:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c ****
318:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** /* Enable or disable the rising trigger */
319:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** if ((GPIO_Init->Mode & RISING_EDGE) == RISING_EDGE)
308 .loc 1 319 9 view .LVU93
309 .loc 1 319 23 is_stmt 0 view .LVU94
310 012a 4A68 ldr r2, [r1, #4]
311 .loc 1 319 12 view .LVU95
312 012c 12F4801F tst r2, #1048576
313 0130 36D0 beq .L23
320:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** {
321:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** SET_BIT(EXTI->RTSR, iocurrent);
314 .loc 1 321 11 is_stmt 1 view .LVU96
315 0132 284C ldr r4, .L39+20
316 0134 A268 ldr r2, [r4, #8]
317 0136 1A43 orrs r2, r2, r3
318 0138 A260 str r2, [r4, #8]
319 .L24:
322:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** }
323:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** else
324:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** {
325:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** CLEAR_BIT(EXTI->RTSR, iocurrent);
326:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** }
327:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c ****
328:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** /* Enable or disable the falling trigger */
329:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** if ((GPIO_Init->Mode & FALLING_EDGE) == FALLING_EDGE)
320 .loc 1 329 9 view .LVU97
321 .loc 1 329 23 is_stmt 0 view .LVU98
ARM GAS /tmp/ccCnQmqA.s page 13
322 013a 4A68 ldr r2, [r1, #4]
323 .loc 1 329 12 view .LVU99
324 013c 12F4001F tst r2, #2097152
325 0140 34D0 beq .L25
330:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** {
331:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** SET_BIT(EXTI->FTSR, iocurrent);
326 .loc 1 331 11 is_stmt 1 view .LVU100
327 0142 244C ldr r4, .L39+20
328 0144 E268 ldr r2, [r4, #12]
329 0146 1343 orrs r3, r3, r2
330 .LVL31:
331 .loc 1 331 11 is_stmt 0 view .LVU101
332 0148 E360 str r3, [r4, #12]
333 .L3:
332:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** }
333:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** else
334:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** {
335:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** CLEAR_BIT(EXTI->FTSR, iocurrent);
336:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** }
337:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** }
338:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** }
339:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c ****
340:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** position++;
334 .loc 1 340 2 is_stmt 1 view .LVU102
335 .loc 1 340 10 is_stmt 0 view .LVU103
336 014a 0135 adds r5, r5, #1
337 .LVL32:
338 .L2:
194:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** {
339 .loc 1 194 21 view .LVU104
340 014c 0B68 ldr r3, [r1]
194:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** {
341 .loc 1 194 9 view .LVU105
342 014e 33FA05F2 lsrs r2, r3, r5
343 0152 31D0 beq .L37
197:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c ****
344 .loc 1 197 5 is_stmt 1 view .LVU106
197:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c ****
345 .loc 1 197 16 is_stmt 0 view .LVU107
346 0154 0124 movs r4, #1
347 0156 AC40 lsls r4, r4, r5
348 .LVL33:
200:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c ****
349 .loc 1 200 5 is_stmt 1 view .LVU108
200:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c ****
350 .loc 1 200 15 is_stmt 0 view .LVU109
351 0158 2340 ands r3, r3, r4
352 .LVL34:
202:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** {
353 .loc 1 202 5 is_stmt 1 view .LVU110
202:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** {
354 .loc 1 202 8 is_stmt 0 view .LVU111
355 015a 9C42 cmp r4, r3
356 015c F5D1 bne .L3
205:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c ****
357 .loc 1 205 7 is_stmt 1 view .LVU112
208:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** {
ARM GAS /tmp/ccCnQmqA.s page 14
358 .loc 1 208 7 view .LVU113
208:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** {
359 .loc 1 208 24 is_stmt 0 view .LVU114
360 015e 4A68 ldr r2, [r1, #4]
208:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** {
361 .loc 1 208 7 view .LVU115
362 0160 122A cmp r2, #18
363 0162 B7D0 beq .L4
364 0164 3FF657AF bhi .L5
365 0168 022A cmp r2, #2
366 016a B0D0 beq .L6
367 016c 7FF64DAF bls .L38
368 0170 032A cmp r2, #3
369 0172 B5D0 beq .L27
370 0174 112A cmp r2, #17
371 0176 7FF45DAF bne .L10
220:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** config = GPIO_Init->Speed + GPIO_CR_CNF_GP_OUTPUT_OD;
372 .loc 1 220 11 is_stmt 1 view .LVU116
221:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** break;
373 .loc 1 221 11 view .LVU117
221:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** break;
374 .loc 1 221 29 is_stmt 0 view .LVU118
375 017a CE68 ldr r6, [r1, #12]
376 .LVL35:
221:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** break;
377 .loc 1 221 18 view .LVU119
378 017c 0436 adds r6, r6, #4
379 .LVL36:
222:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c ****
380 .loc 1 222 11 is_stmt 1 view .LVU120
381 017e 59E7 b .L10
382 .LVL37:
383 .L30:
294:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** AFIO->EXTICR[position >> 2u] = temp;
384 .loc 1 294 9 is_stmt 0 view .LVU121
385 0180 0122 movs r2, #1
386 .LVL38:
294:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** AFIO->EXTICR[position >> 2u] = temp;
387 .loc 1 294 9 view .LVU122
388 0182 BBE7 b .L18
389 .LVL39:
390 .L31:
294:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** AFIO->EXTICR[position >> 2u] = temp;
391 .loc 1 294 9 view .LVU123
392 0184 0222 movs r2, #2
393 0186 B9E7 b .L18
394 .LVL40:
395 .L19:
305:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** }
396 .loc 1 305 11 is_stmt 1 view .LVU124
397 0188 124C ldr r4, .L39+20
398 .LVL41:
305:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** }
399 .loc 1 305 11 is_stmt 0 view .LVU125
400 018a 2268 ldr r2, [r4]
401 018c 22EA0302 bic r2, r2, r3
402 0190 2260 str r2, [r4]
ARM GAS /tmp/ccCnQmqA.s page 15
403 .LVL42:
305:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** }
404 .loc 1 305 11 view .LVU126
405 0192 C2E7 b .L20
406 .L21:
315:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** }
407 .loc 1 315 11 is_stmt 1 view .LVU127
408 0194 0F4C ldr r4, .L39+20
409 0196 6268 ldr r2, [r4, #4]
410 0198 22EA0302 bic r2, r2, r3
411 019c 6260 str r2, [r4, #4]
412 019e C4E7 b .L22
413 .L23:
325:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** }
414 .loc 1 325 11 view .LVU128
415 01a0 0C4C ldr r4, .L39+20
416 01a2 A268 ldr r2, [r4, #8]
417 01a4 22EA0302 bic r2, r2, r3
418 01a8 A260 str r2, [r4, #8]
419 01aa C6E7 b .L24
420 .L25:
335:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** }
421 .loc 1 335 11 view .LVU129
422 01ac 094C ldr r4, .L39+20
423 01ae E268 ldr r2, [r4, #12]
424 01b0 22EA0303 bic r3, r2, r3
425 .LVL43:
335:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** }
426 .loc 1 335 11 is_stmt 0 view .LVU130
427 01b4 E360 str r3, [r4, #12]
428 01b6 C8E7 b .L3
429 .LVL44:
430 .L37:
341:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** }
342:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** }
431 .loc 1 342 1 view .LVU131
432 01b8 02B0 add sp, sp, #8
433 .LCFI2:
434 .cfi_def_cfa_offset 16
435 @ sp needed
436 01ba F0BC pop {r4, r5, r6, r7}
437 .LCFI3:
438 .cfi_restore 7
439 .cfi_restore 6
440 .cfi_restore 5
441 .cfi_restore 4
442 .cfi_def_cfa_offset 0
443 .LVL45:
444 .loc 1 342 1 view .LVU132
445 01bc 7047 bx lr
446 .L40:
447 01be 00BF .align 2
448 .L39:
449 01c0 00002110 .word 270598144
450 01c4 00003110 .word 271646720
451 01c8 00100240 .word 1073876992
452 01cc 00000140 .word 1073807360
ARM GAS /tmp/ccCnQmqA.s page 16
453 01d0 00080140 .word 1073809408
454 01d4 00040140 .word 1073808384
455 .cfi_endproc
456 .LFE65:
458 .section .text.HAL_GPIO_DeInit,"ax",%progbits
459 .align 1
460 .global HAL_GPIO_DeInit
461 .syntax unified
462 .thumb
463 .thumb_func
464 .fpu softvfp
466 HAL_GPIO_DeInit:
467 .LVL46:
468 .LFB66:
343:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c ****
344:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** /**
345:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** * @brief De-initializes the GPIOx peripheral registers to their default reset values.
346:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** * @param GPIOx: where x can be (A..G depending on device used) to select the GPIO peripheral
347:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** * @param GPIO_Pin: specifies the port bit to be written.
348:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** * This parameter can be one of GPIO_PIN_x where x can be (0..15).
349:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** * @retval None
350:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** */
351:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** void HAL_GPIO_DeInit(GPIO_TypeDef *GPIOx, uint32_t GPIO_Pin)
352:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** {
469 .loc 1 352 1 is_stmt 1 view -0
470 .cfi_startproc
471 @ args = 0, pretend = 0, frame = 0
472 @ frame_needed = 0, uses_anonymous_args = 0
473 @ link register save eliminated.
353:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** uint32_t position = 0x00u;
474 .loc 1 353 3 view .LVU134
354:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** uint32_t iocurrent;
475 .loc 1 354 3 view .LVU135
355:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** uint32_t tmp;
476 .loc 1 355 3 view .LVU136
356:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** __IO uint32_t *configregister; /* Store the address of CRL or CRH register based on pin number */
477 .loc 1 356 3 view .LVU137
357:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** uint32_t registeroffset;
478 .loc 1 357 3 view .LVU138
358:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c ****
359:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** /* Check the parameters */
360:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** assert_param(IS_GPIO_ALL_INSTANCE(GPIOx));
479 .loc 1 360 3 view .LVU139
361:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** assert_param(IS_GPIO_PIN(GPIO_Pin));
480 .loc 1 361 3 view .LVU140
362:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c ****
363:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** /* Configure the port pins */
364:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** while ((GPIO_Pin >> position) != 0u)
481 .loc 1 364 3 view .LVU141
353:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** uint32_t iocurrent;
482 .loc 1 353 12 is_stmt 0 view .LVU142
483 0000 0022 movs r2, #0
484 .loc 1 364 9 view .LVU143
485 0002 68E0 b .L56
486 .LVL47:
487 .L63:
488 .LCFI4:
ARM GAS /tmp/ccCnQmqA.s page 17
489 .cfi_def_cfa_offset 16
490 .cfi_offset 4, -16
491 .cfi_offset 5, -12
492 .cfi_offset 6, -8
493 .cfi_offset 7, -4
365:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** {
366:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** /* Get current io position */
367:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** iocurrent = (GPIO_Pin) & (1uL << position);
368:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c ****
369:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** if (iocurrent)
370:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** {
371:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** /*------------------------- EXTI Mode Configuration --------------------*/
372:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** /* Clear the External Interrupt or Event for the current IO */
373:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c ****
374:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** tmp = AFIO->EXTICR[position >> 2u];
375:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** tmp &= 0x0FuL << (4u * (position & 0x03u));
376:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** if (tmp == (GPIO_GET_INDEX(GPIOx) << (4u * (position & 0x03u))))
494 .loc 1 376 19 view .LVU144
495 0004 0326 movs r6, #3
496 0006 00E0 b .L44
497 .L51:
498 0008 0026 movs r6, #0
499 .L44:
500 .loc 1 376 41 discriminator 16 view .LVU145
501 000a 06FA04F4 lsl r4, r6, r4
502 .loc 1 376 10 discriminator 16 view .LVU146
503 000e AC42 cmp r4, r5
504 0010 3FD0 beq .L61
505 .LVL48:
506 .L45:
377:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** {
378:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** tmp = 0x0FuL << (4u * (position & 0x03u));
379:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** CLEAR_BIT(AFIO->EXTICR[position >> 2u], tmp);
380:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c ****
381:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** /* Clear EXTI line configuration */
382:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** CLEAR_BIT(EXTI->IMR, (uint32_t)iocurrent);
383:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** CLEAR_BIT(EXTI->EMR, (uint32_t)iocurrent);
384:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c ****
385:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** /* Clear Rising Falling edge configuration */
386:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** CLEAR_BIT(EXTI->RTSR, (uint32_t)iocurrent);
387:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** CLEAR_BIT(EXTI->FTSR, (uint32_t)iocurrent);
388:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** }
389:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** /*------------------------- GPIO Mode Configuration --------------------*/
390:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** /* Check if the current bit belongs to first half or last half of the pin count number
391:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** in order to address CRH or CRL register */
392:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** configregister = (iocurrent < GPIO_PIN_8) ? &GPIOx->CRL : &GPIOx->CRH;
507 .loc 1 392 7 is_stmt 1 view .LVU147
508 .loc 1 392 67 is_stmt 0 view .LVU148
509 0012 FF2B cmp r3, #255
510 0014 55D8 bhi .L46
511 .loc 1 392 67 discriminator 1 view .LVU149
512 0016 8446 mov ip, r0
513 .L47:
514 .LVL49:
393:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** registeroffset = (iocurrent < GPIO_PIN_8) ? (position << 2u) : ((position - 8u) << 2u);
515 .loc 1 393 7 is_stmt 1 discriminator 4 view .LVU150
516 .loc 1 393 68 is_stmt 0 discriminator 4 view .LVU151
ARM GAS /tmp/ccCnQmqA.s page 18
517 0018 FF2B cmp r3, #255
518 001a 55D8 bhi .L48
519 .loc 1 393 68 discriminator 1 view .LVU152
520 001c 9700 lsls r7, r2, #2
521 .L49:
522 .LVL50:
394:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c ****
395:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** /* CRL/CRH default value is floating input(0x04) shifted to correct position */
396:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** MODIFY_REG(*configregister, ((GPIO_CRL_MODE0 | GPIO_CRL_CNF0) << registeroffset), GPIO_CRL_CN
523 .loc 1 396 7 is_stmt 1 discriminator 4 view .LVU153
524 001e DCF80040 ldr r4, [ip]
525 0022 0F26 movs r6, #15
526 0024 BE40 lsls r6, r6, r7
527 0026 24EA0604 bic r4, r4, r6
528 002a 0425 movs r5, #4
529 002c BD40 lsls r5, r5, r7
530 002e 2C43 orrs r4, r4, r5
531 0030 CCF80040 str r4, [ip]
397:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c ****
398:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** /* ODR default value is 0 */
399:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** CLEAR_BIT(GPIOx->ODR, iocurrent);
532 .loc 1 399 7 discriminator 4 view .LVU154
533 0034 C468 ldr r4, [r0, #12]
534 0036 24EA0303 bic r3, r4, r3
535 .LVL51:
536 .loc 1 399 7 is_stmt 0 discriminator 4 view .LVU155
537 003a C360 str r3, [r0, #12]
538 .L43:
400:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** }
401:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c ****
402:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** position++;
539 .loc 1 402 5 is_stmt 1 view .LVU156
540 .loc 1 402 13 is_stmt 0 view .LVU157
541 003c 0132 adds r2, r2, #1
542 .LVL52:
364:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** {
543 .loc 1 364 9 view .LVU158
544 003e 31FA02F3 lsrs r3, r1, r2
545 0042 45D0 beq .L62
367:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c ****
546 .loc 1 367 5 is_stmt 1 view .LVU159
367:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c ****
547 .loc 1 367 35 is_stmt 0 view .LVU160
548 0044 0123 movs r3, #1
549 0046 9340 lsls r3, r3, r2
550 .LVL53:
369:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** {
551 .loc 1 369 5 is_stmt 1 view .LVU161
369:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** {
552 .loc 1 369 8 is_stmt 0 view .LVU162
553 0048 0B40 ands r3, r3, r1
554 .LVL54:
369:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** {
555 .loc 1 369 8 view .LVU163
556 004a F7D0 beq .L43
557 .LVL55:
558 .L57:
ARM GAS /tmp/ccCnQmqA.s page 19
374:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** tmp &= 0x0FuL << (4u * (position & 0x03u));
559 .loc 1 374 7 is_stmt 1 view .LVU164
374:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** tmp &= 0x0FuL << (4u * (position & 0x03u));
560 .loc 1 374 35 is_stmt 0 view .LVU165
561 004c 4FEA920C lsr ip, r2, #2
374:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** tmp &= 0x0FuL << (4u * (position & 0x03u));
562 .loc 1 374 11 view .LVU166
563 0050 0CF10205 add r5, ip, #2
564 0054 254C ldr r4, .L66
565 0056 54F82550 ldr r5, [r4, r5, lsl #2]
566 .LVL56:
375:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** if (tmp == (GPIO_GET_INDEX(GPIOx) << (4u * (position & 0x03u))))
567 .loc 1 375 7 is_stmt 1 view .LVU167
375:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** if (tmp == (GPIO_GET_INDEX(GPIOx) << (4u * (position & 0x03u))))
568 .loc 1 375 40 is_stmt 0 view .LVU168
569 005a 02F00304 and r4, r2, #3
375:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** if (tmp == (GPIO_GET_INDEX(GPIOx) << (4u * (position & 0x03u))))
570 .loc 1 375 28 view .LVU169
571 005e A400 lsls r4, r4, #2
375:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** if (tmp == (GPIO_GET_INDEX(GPIOx) << (4u * (position & 0x03u))))
572 .loc 1 375 21 view .LVU170
573 0060 0F26 movs r6, #15
574 0062 06FA04F7 lsl r7, r6, r4
375:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** if (tmp == (GPIO_GET_INDEX(GPIOx) << (4u * (position & 0x03u))))
575 .loc 1 375 11 view .LVU171
576 0066 3D40 ands r5, r5, r7
577 .LVL57:
376:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** {
578 .loc 1 376 7 is_stmt 1 view .LVU172
376:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** {
579 .loc 1 376 19 is_stmt 0 view .LVU173
580 0068 214E ldr r6, .L66+4
581 006a B042 cmp r0, r6
582 006c CCD0 beq .L51
376:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** {
583 .loc 1 376 19 discriminator 1 view .LVU174
584 006e 06F58066 add r6, r6, #1024
585 0072 B042 cmp r0, r6
586 0074 09D0 beq .L52
376:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** {
587 .loc 1 376 19 discriminator 3 view .LVU175
588 0076 06F58066 add r6, r6, #1024
589 007a B042 cmp r0, r6
590 007c 07D0 beq .L53
376:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** {
591 .loc 1 376 19 discriminator 5 view .LVU176
592 007e 06F58066 add r6, r6, #1024
593 0082 B042 cmp r0, r6
594 0084 BED0 beq .L63
376:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** {
595 .loc 1 376 19 view .LVU177
596 0086 0426 movs r6, #4
597 0088 BFE7 b .L44
598 .L52:
599 008a 0126 movs r6, #1
600 008c BDE7 b .L44
601 .L53:
ARM GAS /tmp/ccCnQmqA.s page 20
602 008e 0226 movs r6, #2
603 0090 BBE7 b .L44
604 .L61:
378:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** CLEAR_BIT(AFIO->EXTICR[position >> 2u], tmp);
605 .loc 1 378 9 is_stmt 1 view .LVU178
606 .LVL58:
379:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c ****
607 .loc 1 379 9 view .LVU179
608 0092 164D ldr r5, .L66
609 0094 0CF10204 add r4, ip, #2
610 0098 55F82460 ldr r6, [r5, r4, lsl #2]
611 009c 26EA0706 bic r6, r6, r7
612 00a0 45F82460 str r6, [r5, r4, lsl #2]
382:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** CLEAR_BIT(EXTI->EMR, (uint32_t)iocurrent);
613 .loc 1 382 9 view .LVU180
614 00a4 134C ldr r4, .L66+8
615 00a6 2668 ldr r6, [r4]
616 00a8 DD43 mvns r5, r3
617 00aa 2E40 ands r6, r6, r5
618 00ac 2660 str r6, [r4]
383:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c ****
619 .loc 1 383 9 view .LVU181
620 00ae 6668 ldr r6, [r4, #4]
621 00b0 2E40 ands r6, r6, r5
622 00b2 6660 str r6, [r4, #4]
386:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** CLEAR_BIT(EXTI->FTSR, (uint32_t)iocurrent);
623 .loc 1 386 9 view .LVU182
624 00b4 A668 ldr r6, [r4, #8]
625 00b6 2E40 ands r6, r6, r5
626 00b8 A660 str r6, [r4, #8]
387:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** }
627 .loc 1 387 9 view .LVU183
628 00ba E668 ldr r6, [r4, #12]
629 00bc 3540 ands r5, r5, r6
630 00be E560 str r5, [r4, #12]
631 00c0 A7E7 b .L45
632 .LVL59:
633 .L46:
392:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** registeroffset = (iocurrent < GPIO_PIN_8) ? (position << 2u) : ((position - 8u) << 2u);
634 .loc 1 392 67 is_stmt 0 discriminator 2 view .LVU184
635 00c2 00F1040C add ip, r0, #4
636 00c6 A7E7 b .L47
637 .LVL60:
638 .L48:
393:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c ****
639 .loc 1 393 81 discriminator 2 view .LVU185
640 00c8 A2F10805 sub r5, r2, #8
393:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c ****
641 .loc 1 393 68 discriminator 2 view .LVU186
642 00cc AF00 lsls r7, r5, #2
643 00ce A6E7 b .L49
644 .LVL61:
645 .L62:
403:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** }
404:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** }
646 .loc 1 404 1 view .LVU187
647 00d0 F0BC pop {r4, r5, r6, r7}
ARM GAS /tmp/ccCnQmqA.s page 21
648 .LCFI5:
649 .cfi_restore 7
650 .cfi_restore 6
651 .cfi_restore 5
652 .cfi_restore 4
653 .cfi_def_cfa_offset 0
654 .LVL62:
655 .loc 1 404 1 view .LVU188
656 00d2 7047 bx lr
657 .LVL63:
658 .L65:
402:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** }
659 .loc 1 402 5 is_stmt 1 view .LVU189
402:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** }
660 .loc 1 402 13 is_stmt 0 view .LVU190
661 00d4 0132 adds r2, r2, #1
662 .LVL64:
663 .L56:
364:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** {
664 .loc 1 364 9 view .LVU191
665 00d6 31FA02F3 lsrs r3, r1, r2
666 00da 05D0 beq .L64
367:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c ****
667 .loc 1 367 5 is_stmt 1 view .LVU192
367:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c ****
668 .loc 1 367 35 is_stmt 0 view .LVU193
669 00dc 0123 movs r3, #1
670 00de 9340 lsls r3, r3, r2
671 .LVL65:
369:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** {
672 .loc 1 369 5 is_stmt 1 view .LVU194
369:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** {
673 .loc 1 369 8 is_stmt 0 view .LVU195
674 00e0 0B40 ands r3, r3, r1
675 .LVL66:
369:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** {
676 .loc 1 369 8 view .LVU196
677 00e2 F7D0 beq .L65
352:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** uint32_t position = 0x00u;
678 .loc 1 352 1 view .LVU197
679 00e4 F0B4 push {r4, r5, r6, r7}
680 .LCFI6:
681 .cfi_def_cfa_offset 16
682 .cfi_offset 4, -16
683 .cfi_offset 5, -12
684 .cfi_offset 6, -8
685 .cfi_offset 7, -4
686 00e6 B1E7 b .L57
687 .LVL67:
688 .L64:
689 .LCFI7:
690 .cfi_def_cfa_offset 0
691 .cfi_restore 4
692 .cfi_restore 5
693 .cfi_restore 6
694 .cfi_restore 7
352:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** uint32_t position = 0x00u;
ARM GAS /tmp/ccCnQmqA.s page 22
695 .loc 1 352 1 view .LVU198
696 00e8 7047 bx lr
697 .L67:
698 00ea 00BF .align 2
699 .L66:
700 00ec 00000140 .word 1073807360
701 00f0 00080140 .word 1073809408
702 00f4 00040140 .word 1073808384
703 .cfi_endproc
704 .LFE66:
706 .section .text.HAL_GPIO_ReadPin,"ax",%progbits
707 .align 1
708 .global HAL_GPIO_ReadPin
709 .syntax unified
710 .thumb
711 .thumb_func
712 .fpu softvfp
714 HAL_GPIO_ReadPin:
715 .LVL68:
716 .LFB67:
405:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c ****
406:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** /**
407:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** * @}
408:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** */
409:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c ****
410:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** /** @defgroup GPIO_Exported_Functions_Group2 IO operation functions
411:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** * @brief GPIO Read and Write
412:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** *
413:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** @verbatim
414:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** ===============================================================================
415:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** ##### IO operation functions #####
416:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** ===============================================================================
417:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** [..]
418:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** This subsection provides a set of functions allowing to manage the GPIOs.
419:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c ****
420:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** @endverbatim
421:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** * @{
422:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** */
423:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c ****
424:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** /**
425:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** * @brief Reads the specified input port pin.
426:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** * @param GPIOx: where x can be (A..G depending on device used) to select the GPIO peripheral
427:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** * @param GPIO_Pin: specifies the port bit to read.
428:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** * This parameter can be GPIO_PIN_x where x can be (0..15).
429:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** * @retval The input port pin value.
430:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** */
431:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** GPIO_PinState HAL_GPIO_ReadPin(GPIO_TypeDef *GPIOx, uint16_t GPIO_Pin)
432:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** {
717 .loc 1 432 1 is_stmt 1 view -0
718 .cfi_startproc
719 @ args = 0, pretend = 0, frame = 0
720 @ frame_needed = 0, uses_anonymous_args = 0
721 @ link register save eliminated.
433:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** GPIO_PinState bitstatus;
722 .loc 1 433 3 view .LVU200
434:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c ****
435:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** /* Check the parameters */
ARM GAS /tmp/ccCnQmqA.s page 23
436:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** assert_param(IS_GPIO_PIN(GPIO_Pin));
723 .loc 1 436 3 view .LVU201
437:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c ****
438:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** if ((GPIOx->IDR & GPIO_Pin) != (uint32_t)GPIO_PIN_RESET)
724 .loc 1 438 3 view .LVU202
725 .loc 1 438 13 is_stmt 0 view .LVU203
726 0000 8368 ldr r3, [r0, #8]
727 .loc 1 438 6 view .LVU204
728 0002 1942 tst r1, r3
729 0004 01D0 beq .L70
439:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** {
440:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** bitstatus = GPIO_PIN_SET;
730 .loc 1 440 15 view .LVU205
731 0006 0120 movs r0, #1
732 .LVL69:
733 .loc 1 440 15 view .LVU206
734 0008 7047 bx lr
735 .LVL70:
736 .L70:
441:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** }
442:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** else
443:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** {
444:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** bitstatus = GPIO_PIN_RESET;
737 .loc 1 444 15 view .LVU207
738 000a 0020 movs r0, #0
739 .LVL71:
445:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** }
446:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** return bitstatus;
740 .loc 1 446 3 is_stmt 1 view .LVU208
447:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** }
741 .loc 1 447 1 is_stmt 0 view .LVU209
742 000c 7047 bx lr
743 .cfi_endproc
744 .LFE67:
746 .section .text.HAL_GPIO_WritePin,"ax",%progbits
747 .align 1
748 .global HAL_GPIO_WritePin
749 .syntax unified
750 .thumb
751 .thumb_func
752 .fpu softvfp
754 HAL_GPIO_WritePin:
755 .LVL72:
756 .LFB68:
448:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c ****
449:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** /**
450:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** * @brief Sets or clears the selected data port bit.
451:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** *
452:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** * @note This function uses GPIOx_BSRR register to allow atomic read/modify
453:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** * accesses. In this way, there is no risk of an IRQ occurring between
454:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** * the read and the modify access.
455:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** *
456:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** * @param GPIOx: where x can be (A..G depending on device used) to select the GPIO peripheral
457:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** * @param GPIO_Pin: specifies the port bit to be written.
458:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** * This parameter can be one of GPIO_PIN_x where x can be (0..15).
459:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** * @param PinState: specifies the value to be written to the selected bit.
460:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** * This parameter can be one of the GPIO_PinState enum values:
ARM GAS /tmp/ccCnQmqA.s page 24
461:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** * @arg GPIO_PIN_RESET: to clear the port pin
462:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** * @arg GPIO_PIN_SET: to set the port pin
463:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** * @retval None
464:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** */
465:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** void HAL_GPIO_WritePin(GPIO_TypeDef *GPIOx, uint16_t GPIO_Pin, GPIO_PinState PinState)
466:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** {
757 .loc 1 466 1 is_stmt 1 view -0
758 .cfi_startproc
759 @ args = 0, pretend = 0, frame = 0
760 @ frame_needed = 0, uses_anonymous_args = 0
761 @ link register save eliminated.
467:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** /* Check the parameters */
468:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** assert_param(IS_GPIO_PIN(GPIO_Pin));
762 .loc 1 468 3 view .LVU211
469:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** assert_param(IS_GPIO_PIN_ACTION(PinState));
763 .loc 1 469 3 view .LVU212
470:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c ****
471:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** if (PinState != GPIO_PIN_RESET)
764 .loc 1 471 3 view .LVU213
765 .loc 1 471 6 is_stmt 0 view .LVU214
766 0000 0AB1 cbz r2, .L72
472:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** {
473:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** GPIOx->BSRR = GPIO_Pin;
767 .loc 1 473 5 is_stmt 1 view .LVU215
768 .loc 1 473 17 is_stmt 0 view .LVU216
769 0002 0161 str r1, [r0, #16]
770 0004 7047 bx lr
771 .L72:
474:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** }
475:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** else
476:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** {
477:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** GPIOx->BSRR = (uint32_t)GPIO_Pin << 16u;
772 .loc 1 477 5 is_stmt 1 view .LVU217
773 .loc 1 477 38 is_stmt 0 view .LVU218
774 0006 0904 lsls r1, r1, #16
775 .LVL73:
776 .loc 1 477 17 view .LVU219
777 0008 0161 str r1, [r0, #16]
478:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** }
479:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** }
778 .loc 1 479 1 view .LVU220
779 000a 7047 bx lr
780 .cfi_endproc
781 .LFE68:
783 .section .text.HAL_GPIO_TogglePin,"ax",%progbits
784 .align 1
785 .global HAL_GPIO_TogglePin
786 .syntax unified
787 .thumb
788 .thumb_func
789 .fpu softvfp
791 HAL_GPIO_TogglePin:
792 .LVL74:
793 .LFB69:
480:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c ****
481:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** /**
482:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** * @brief Toggles the specified GPIO pin
ARM GAS /tmp/ccCnQmqA.s page 25
483:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** * @param GPIOx: where x can be (A..G depending on device used) to select the GPIO peripheral
484:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** * @param GPIO_Pin: Specifies the pins to be toggled.
485:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** * @retval None
486:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** */
487:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** void HAL_GPIO_TogglePin(GPIO_TypeDef *GPIOx, uint16_t GPIO_Pin)
488:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** {
794 .loc 1 488 1 is_stmt 1 view -0
795 .cfi_startproc
796 @ args = 0, pretend = 0, frame = 0
797 @ frame_needed = 0, uses_anonymous_args = 0
798 @ link register save eliminated.
489:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** uint32_t odr;
799 .loc 1 489 3 view .LVU222
490:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c ****
491:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** /* Check the parameters */
492:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** assert_param(IS_GPIO_PIN(GPIO_Pin));
800 .loc 1 492 3 view .LVU223
493:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c ****
494:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** /* get current Ouput Data Register value */
495:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** odr = GPIOx->ODR;
801 .loc 1 495 3 view .LVU224
802 .loc 1 495 7 is_stmt 0 view .LVU225
803 0000 C368 ldr r3, [r0, #12]
804 .LVL75:
496:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c ****
497:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** /* Set selected pins that were at low level, and reset ones that were high */
498:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** GPIOx->BSRR = ((odr & GPIO_Pin) << GPIO_NUMBER) | (~odr & GPIO_Pin);
805 .loc 1 498 3 is_stmt 1 view .LVU226
806 .loc 1 498 23 is_stmt 0 view .LVU227
807 0002 01EA0302 and r2, r1, r3
808 .loc 1 498 59 view .LVU228
809 0006 21EA0301 bic r1, r1, r3
810 .LVL76:
811 .loc 1 498 51 view .LVU229
812 000a 41EA0241 orr r1, r1, r2, lsl #16
813 .loc 1 498 15 view .LVU230
814 000e 0161 str r1, [r0, #16]
499:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** }
815 .loc 1 499 1 view .LVU231
816 0010 7047 bx lr
817 .cfi_endproc
818 .LFE69:
820 .section .text.HAL_GPIO_LockPin,"ax",%progbits
821 .align 1
822 .global HAL_GPIO_LockPin
823 .syntax unified
824 .thumb
825 .thumb_func
826 .fpu softvfp
828 HAL_GPIO_LockPin:
829 .LVL77:
830 .LFB70:
500:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c ****
501:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** /**
502:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** * @brief Locks GPIO Pins configuration registers.
503:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** * @note The locking mechanism allows the IO configuration to be frozen. When the LOCK sequence
504:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** * has been applied on a port bit, it is no longer possible to modify the value of the port
ARM GAS /tmp/ccCnQmqA.s page 26
505:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** * the next reset.
506:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** * @param GPIOx: where x can be (A..G depending on device used) to select the GPIO peripheral
507:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** * @param GPIO_Pin: specifies the port bit to be locked.
508:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** * This parameter can be any combination of GPIO_Pin_x where x can be (0..15).
509:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** * @retval None
510:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** */
511:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** HAL_StatusTypeDef HAL_GPIO_LockPin(GPIO_TypeDef *GPIOx, uint16_t GPIO_Pin)
512:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** {
831 .loc 1 512 1 is_stmt 1 view -0
832 .cfi_startproc
833 @ args = 0, pretend = 0, frame = 8
834 @ frame_needed = 0, uses_anonymous_args = 0
835 @ link register save eliminated.
836 .loc 1 512 1 is_stmt 0 view .LVU233
837 0000 82B0 sub sp, sp, #8
838 .LCFI8:
839 .cfi_def_cfa_offset 8
513:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** __IO uint32_t tmp = GPIO_LCKR_LCKK;
840 .loc 1 513 3 is_stmt 1 view .LVU234
841 .loc 1 513 17 is_stmt 0 view .LVU235
842 0002 4FF48033 mov r3, #65536
843 0006 0193 str r3, [sp, #4]
514:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c ****
515:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** /* Check the parameters */
516:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** assert_param(IS_GPIO_LOCK_INSTANCE(GPIOx));
844 .loc 1 516 3 is_stmt 1 view .LVU236
517:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** assert_param(IS_GPIO_PIN(GPIO_Pin));
845 .loc 1 517 3 view .LVU237
518:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c ****
519:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** /* Apply lock key write sequence */
520:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** SET_BIT(tmp, GPIO_Pin);
846 .loc 1 520 3 view .LVU238
847 0008 019B ldr r3, [sp, #4]
848 000a 0B43 orrs r3, r3, r1
849 000c 0193 str r3, [sp, #4]
521:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** /* Set LCKx bit(s): LCKK='1' + LCK[15-0] */
522:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** GPIOx->LCKR = tmp;
850 .loc 1 522 3 view .LVU239
851 .loc 1 522 15 is_stmt 0 view .LVU240
852 000e 019B ldr r3, [sp, #4]
853 0010 8361 str r3, [r0, #24]
523:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** /* Reset LCKx bit(s): LCKK='0' + LCK[15-0] */
524:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** GPIOx->LCKR = GPIO_Pin;
854 .loc 1 524 3 is_stmt 1 view .LVU241
855 .loc 1 524 15 is_stmt 0 view .LVU242
856 0012 8161 str r1, [r0, #24]
525:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** /* Set LCKx bit(s): LCKK='1' + LCK[15-0] */
526:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** GPIOx->LCKR = tmp;
857 .loc 1 526 3 is_stmt 1 view .LVU243
858 .loc 1 526 15 is_stmt 0 view .LVU244
859 0014 019B ldr r3, [sp, #4]
860 0016 8361 str r3, [r0, #24]
527:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** /* Read LCKK register. This read is mandatory to complete key lock sequence */
528:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** tmp = GPIOx->LCKR;
861 .loc 1 528 3 is_stmt 1 view .LVU245
862 .loc 1 528 14 is_stmt 0 view .LVU246
863 0018 8369 ldr r3, [r0, #24]
ARM GAS /tmp/ccCnQmqA.s page 27
864 .loc 1 528 7 view .LVU247
865 001a 0193 str r3, [sp, #4]
529:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c ****
530:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** /* read again in order to confirm lock is active */
531:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** if ((uint32_t)(GPIOx->LCKR & GPIO_LCKR_LCKK))
866 .loc 1 531 3 is_stmt 1 view .LVU248
867 .loc 1 531 23 is_stmt 0 view .LVU249
868 001c 8369 ldr r3, [r0, #24]
869 .loc 1 531 6 view .LVU250
870 001e 13F4803F tst r3, #65536
871 0022 02D0 beq .L77
532:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** {
533:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** return HAL_OK;
872 .loc 1 533 12 view .LVU251
873 0024 0020 movs r0, #0
874 .LVL78:
875 .L76:
534:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** }
535:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** else
536:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** {
537:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** return HAL_ERROR;
538:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** }
539:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** }
876 .loc 1 539 1 view .LVU252
877 0026 02B0 add sp, sp, #8
878 .LCFI9:
879 .cfi_remember_state
880 .cfi_def_cfa_offset 0
881 @ sp needed
882 0028 7047 bx lr
883 .LVL79:
884 .L77:
885 .LCFI10:
886 .cfi_restore_state
537:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** }
887 .loc 1 537 12 view .LVU253
888 002a 0120 movs r0, #1
889 .LVL80:
537:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** }
890 .loc 1 537 12 view .LVU254
891 002c FBE7 b .L76
892 .cfi_endproc
893 .LFE70:
895 .section .text.HAL_GPIO_EXTI_Callback,"ax",%progbits
896 .align 1
897 .weak HAL_GPIO_EXTI_Callback
898 .syntax unified
899 .thumb
900 .thumb_func
901 .fpu softvfp
903 HAL_GPIO_EXTI_Callback:
904 .LVL81:
905 .LFB72:
540:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c ****
541:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** /**
542:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** * @brief This function handles EXTI interrupt request.
543:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** * @param GPIO_Pin: Specifies the pins connected EXTI line
ARM GAS /tmp/ccCnQmqA.s page 28
544:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** * @retval None
545:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** */
546:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** void HAL_GPIO_EXTI_IRQHandler(uint16_t GPIO_Pin)
547:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** {
548:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** /* EXTI line interrupt detected */
549:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** if (__HAL_GPIO_EXTI_GET_IT(GPIO_Pin) != 0x00u)
550:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** {
551:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** __HAL_GPIO_EXTI_CLEAR_IT(GPIO_Pin);
552:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** HAL_GPIO_EXTI_Callback(GPIO_Pin);
553:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** }
554:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** }
555:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c ****
556:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** /**
557:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** * @brief EXTI line detection callbacks.
558:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** * @param GPIO_Pin: Specifies the pins connected EXTI line
559:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** * @retval None
560:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** */
561:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** __weak void HAL_GPIO_EXTI_Callback(uint16_t GPIO_Pin)
562:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** {
906 .loc 1 562 1 is_stmt 1 view -0
907 .cfi_startproc
908 @ args = 0, pretend = 0, frame = 0
909 @ frame_needed = 0, uses_anonymous_args = 0
910 @ link register save eliminated.
563:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** /* Prevent unused argument(s) compilation warning */
564:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** UNUSED(GPIO_Pin);
911 .loc 1 564 3 view .LVU256
565:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** /* NOTE: This function Should not be modified, when the callback is needed,
566:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** the HAL_GPIO_EXTI_Callback could be implemented in the user file
567:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** */
568:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** }
912 .loc 1 568 1 is_stmt 0 view .LVU257
913 0000 7047 bx lr
914 .cfi_endproc
915 .LFE72:
917 .section .text.HAL_GPIO_EXTI_IRQHandler,"ax",%progbits
918 .align 1
919 .global HAL_GPIO_EXTI_IRQHandler
920 .syntax unified
921 .thumb
922 .thumb_func
923 .fpu softvfp
925 HAL_GPIO_EXTI_IRQHandler:
926 .LVL82:
927 .LFB71:
547:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** /* EXTI line interrupt detected */
928 .loc 1 547 1 is_stmt 1 view -0
929 .cfi_startproc
930 @ args = 0, pretend = 0, frame = 0
931 @ frame_needed = 0, uses_anonymous_args = 0
547:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** /* EXTI line interrupt detected */
932 .loc 1 547 1 is_stmt 0 view .LVU259
933 0000 08B5 push {r3, lr}
934 .LCFI11:
935 .cfi_def_cfa_offset 8
936 .cfi_offset 3, -8
937 .cfi_offset 14, -4
ARM GAS /tmp/ccCnQmqA.s page 29
549:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** {
938 .loc 1 549 3 is_stmt 1 view .LVU260
549:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** {
939 .loc 1 549 7 is_stmt 0 view .LVU261
940 0002 054B ldr r3, .L84
941 0004 5B69 ldr r3, [r3, #20]
549:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** {
942 .loc 1 549 6 view .LVU262
943 0006 0342 tst r3, r0
944 0008 00D1 bne .L83
945 .LVL83:
946 .L80:
554:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c ****
947 .loc 1 554 1 view .LVU263
948 000a 08BD pop {r3, pc}
949 .LVL84:
950 .L83:
551:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** HAL_GPIO_EXTI_Callback(GPIO_Pin);
951 .loc 1 551 5 is_stmt 1 view .LVU264
952 000c 024B ldr r3, .L84
953 000e 5861 str r0, [r3, #20]
552:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c **** }
954 .loc 1 552 5 view .LVU265
955 0010 FFF7FEFF bl HAL_GPIO_EXTI_Callback
956 .LVL85:
554:Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c ****
957 .loc 1 554 1 is_stmt 0 view .LVU266
958 0014 F9E7 b .L80
959 .L85:
960 0016 00BF .align 2
961 .L84:
962 0018 00040140 .word 1073808384
963 .cfi_endproc
964 .LFE71:
966 .text
967 .Letext0:
968 .file 2 "/usr/arm-none-eabi/include/machine/_default_types.h"
969 .file 3 "/usr/arm-none-eabi/include/sys/_stdint.h"
970 .file 4 "Drivers/CMSIS/Include/core_cm3.h"
971 .file 5 "Drivers/CMSIS/Device/ST/STM32F1xx/Include/system_stm32f1xx.h"
972 .file 6 "Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f103xb.h"
973 .file 7 "Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_def.h"
974 .file 8 "Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_gpio.h"
975 .file 9 "Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal.h"
ARM GAS /tmp/ccCnQmqA.s page 30
DEFINED SYMBOLS
*ABS*:0000000000000000 stm32f1xx_hal_gpio.c
/tmp/ccCnQmqA.s:16 .text.HAL_GPIO_Init:0000000000000000 $t
/tmp/ccCnQmqA.s:24 .text.HAL_GPIO_Init:0000000000000000 HAL_GPIO_Init
/tmp/ccCnQmqA.s:449 .text.HAL_GPIO_Init:00000000000001c0 $d
/tmp/ccCnQmqA.s:459 .text.HAL_GPIO_DeInit:0000000000000000 $t
/tmp/ccCnQmqA.s:466 .text.HAL_GPIO_DeInit:0000000000000000 HAL_GPIO_DeInit
/tmp/ccCnQmqA.s:700 .text.HAL_GPIO_DeInit:00000000000000ec $d
/tmp/ccCnQmqA.s:707 .text.HAL_GPIO_ReadPin:0000000000000000 $t
/tmp/ccCnQmqA.s:714 .text.HAL_GPIO_ReadPin:0000000000000000 HAL_GPIO_ReadPin
/tmp/ccCnQmqA.s:747 .text.HAL_GPIO_WritePin:0000000000000000 $t
/tmp/ccCnQmqA.s:754 .text.HAL_GPIO_WritePin:0000000000000000 HAL_GPIO_WritePin
/tmp/ccCnQmqA.s:784 .text.HAL_GPIO_TogglePin:0000000000000000 $t
/tmp/ccCnQmqA.s:791 .text.HAL_GPIO_TogglePin:0000000000000000 HAL_GPIO_TogglePin
/tmp/ccCnQmqA.s:821 .text.HAL_GPIO_LockPin:0000000000000000 $t
/tmp/ccCnQmqA.s:828 .text.HAL_GPIO_LockPin:0000000000000000 HAL_GPIO_LockPin
/tmp/ccCnQmqA.s:896 .text.HAL_GPIO_EXTI_Callback:0000000000000000 $t
/tmp/ccCnQmqA.s:903 .text.HAL_GPIO_EXTI_Callback:0000000000000000 HAL_GPIO_EXTI_Callback
/tmp/ccCnQmqA.s:918 .text.HAL_GPIO_EXTI_IRQHandler:0000000000000000 $t
/tmp/ccCnQmqA.s:925 .text.HAL_GPIO_EXTI_IRQHandler:0000000000000000 HAL_GPIO_EXTI_IRQHandler
/tmp/ccCnQmqA.s:962 .text.HAL_GPIO_EXTI_IRQHandler:0000000000000018 $d
NO UNDEFINED SYMBOLS
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